STM32U073RCY6 datasheet(72/146 Pages) STMICROELECTRONICS

72 / 146 page

For CL1 and CL2, it is recommended to use high-quality external ceramic capacitors in the 5 pF to 20 pF range

(typ.), designed for high-frequency applications, and selected to match the requirements of the crystal or

resonator (see Figure 18. Typical application with an 8 MHz crystal). CL1 and CL2 are usually the same size. The

crystal manufacturer typically specifies a load capacitance which is the series combination of CL1 and CL2. PCB

and MCU pin capacitance must be included (10 pF can be used as a rough estimate of the combined pin and

board capacitance) when sizing CL1 and CL2.

Note:

For information on selecting the crystal, refer to the application note AN2867 “Oscillator design guide for ST

microcontrollers” available from the ST website www.st.com.

Figure 18. Typical application with an 8 MHz crystal

(1)

OSC_IN

OSC_OUT

Bias

controlled

gain

fHSE

REXT

8 MHz

resonator

Resonator with integrated

capacitors

CL1

CL2

1. REXT value depends on the crystal characteristics.

Low-speed external clock generated from a crystal resonator

The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal resonator oscillator. All the

information given in this paragraph are based on design simulation results obtained with typical external

components specified in Table 51. LSE oscillator characteristics (fLSE = 32.768 kHz). In the application, the

resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize

output distortion and startup stabilization time. Refer to the crystal resonator manufacturer for more details on the

resonator characteristics (frequency, package, accuracy).

Table 51. LSE oscillator characteristics (fLSE = 32.768 kHz)

Specified by design, not tested in production.

Symbol

Parameter

Conditions(1)

Min

Typ

Max

Unit

IDD(LSE)

LSE current consumption

LSEDRV[1:0] = 00, low drive capability

250

LSEDRV[1:0] = 01, medium low drive capability

315

LSEDRV[1:0] = 10, medium high drive capability

500

LSEDRV[1:0] = 11, high drive capability

630

Gmcritmax

Maximum critical crystal gm

LSEDRV[1:0] = 00, low drive capability

0.5

µA/V

LSEDRV[1:0] = 01, medium low drive capability

0.75

LSEDRV[1:0] = 10, medium high drive capability

1.7

LSEDRV[1:0] = 11, high drive capability

2.7

tSU(LSE)(2)

Startup time

VDD is stabilized

1. Refer to the note and caution paragraphs below the table, and to the application note AN2867 “Oscillator design guide for ST

microcontrollers”.

2. tSU(LSE) is the startup time measured from the moment it is enabled (by software) to a stabilized 32.768 kHz oscillation is reached. This

value is measured for a standard crystal and it can vary significantly with the crystal manufacturer

STM32U073x8/B/C

Electrical characteristics

DS14548 - Rev 2

page 72/146

STM32U073RCY6 Datasheet(PDF) 72 Page - STMicroelectronics

STM32U073RCY6 Datasheet(HTML) 72 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL