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STM32U073RCI3TR Datasheet(PDF) 87 Page - STMicroelectronics |
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STM32U073RCI3TR Datasheet(HTML) 87 Page - STMicroelectronics |
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87 / 146 page  Symbol Parameter Conditions Min Typ Max Unit VIL(NRST) NRST input low level voltage - - - 0.3 × VDDIOx V VIH(NRST) NRST input high level voltage - 0.7 × VDDIOx - - Vhys(NRST) NRST Schmitt trigger voltage hysteresis - - 200 - mV RPU Weak pull-up equivalent resistor(1) VIN = VSS 25 40 55 kΩ VF(NRST) NRST input filtered pulse - - - 70 ns VNF(NRST) NRST input not filtered pulse 1.71 V ≤ VDD ≤ 3.6 V 350 - - ns 1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance is minimal (~10% order). Figure 25. Recommended NRST pin protection MS19878V3 RPU VDD Internal reset External reset circuit(1) NRST(2) Filter 0.1 µF(3) 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the voltage level on the NRST pin can go above the VIH(NRST) minimum level specified in Table 67. NRST pin characteristics during each power on, otherwise the device does not exit from reset. This is applicable to all NRST configurations selected through the NRST_MODE[1:0] bitfield of the FLASH_OPTR register, including GPIO mode. 3. The external capacitor on NRST must be placed as close as possible to the device. 6.3.16 Extended interrupt and event controller input (EXTI) characteristics The pulse on the interrupt input must have a minimal length in order to guarantee that it is detected by the event controller. Table 68. EXTI Input Characteristics Specified by design, not tested in production. Symbol Parameter Conditions Min Typ Max Unit PLEC Pulse length to event controller - 20 - - ns 6.3.17 Analog switches booster Table 69. Analog switches booster characteristics Specified by design, not tested in production. Symbol Parameter Min Typ Max Unit VDD Supply voltage 1.62 - 3.6 V tSU(BOOST) Booster startup time - - 240 µs STM32U073x8/B/C Electrical characteristics DS14548 - Rev 2 page 87/146 |
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