STM32U073RCU6TR datasheet(23/146 Pages) STMICROELECTRONICS

23 / 146 page

3.24.5

Independent watchdog (IWDG)

The independent watchdog is based on an 8-bit prescaler and 12-bit downcounter with user-defined refresh

window. It is clocked from an independent 32 kHz internal RC (LSI).

Independent of the main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog to

reset the device when a problem occurs, or as a free-running timer for application timeout management. It is

hardware- or software-configurable through the option bytes. Its counter can be frozen in debug mode.

3.24.6

System window watchdog (WWDG)

The window watchdog is based on a 7-bit downcounter that can be set as free-running. It can be used as a

watchdog to reset the device when a problem occurs. It is clocked by the system clock. It has an early-warning

interrupt capability. Its counter can be frozen in debug mode.

3.24.7

SysTick timer

This timer is dedicated to real-time operating systems, but it can also be used as a standard down counter.

Features of SysTick timer:

•

24-bit down counter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source

3.25

Real-time clock (RTC), tamper (TAMP) and backup registers

The device embeds an RTC and nine 32-bit backup registers, located in the RTC domain of the silicon die.

The ways of powering the RTC domain are described in Section 3.6.1: Power supply schemes.

The RTC is an independent BCD timer/counter.

Features of the RTC:

•

Calendar with subsecond, seconds, minutes, hours (12 or 24 format), week day, date, month, year, in BCD

(binary-coded decimal) format

•

Automatic correction for 28, 29 (leap year), 30, and 31 days of the month

•

Programmable alarm

•

On-the-fly correction from 1 to 32767 RTC clock pulses, usable for synchronization with a master clock

•

Reference clock detection - a more precise second-source clock (50 or 60 Hz) can be used to improve the

calendar precision

•

Digital calibration circuit with 0.95 ppm resolution, to compensate for quartz crystal inaccuracy

•

Five anti-tamper detection pins with programmable filter

•

Timestamp feature to save a calendar snapshot, triggered by an event on the timestamp pin or a tamper

event, or by switching to VBAT mode

•

17-bit auto-reload wake-up timer (WUT) for periodic events, with programmable resolution and period

•

Multiple clock sources and references:

–

A 32.768 kHz external crystal (LSE)

–

An external resonator or oscillator (LSE)

–

The internal low-power RC oscillator (LSI, with typical frequency of 32 kHz)

–

The high-speed external clock (HSE) divided by 32

When clocked by LSE, the RTC operates in VBAT mode and in all low-power modes. When clocked by LSI, the

RTC does not operate in VBAT mode, but it does in low-power modes except for the Shutdown mode.

All RTC events (alarm, wake-up timer, timestamp or tamper) can generate an interrupt and wake the device up

from the low-power modes.

The backup registers allow keeping 20 bytes of user application data in the event of VDD failure, if a valid backup

supply voltage is provided on VBAT pin. They are not affected by the system reset, power reset, and upon the

device wake-up from Standby or Shutdown modes.

3.26

Inter-integrated circuit interface (I2C)

The device embeds four I2C peripherals. Refer to Table 8 for the features.

STM32U073x8/B/C

Functional overview

DS14548 - Rev 2

page 23/146

STM32U073RCU6TR Datasheet(PDF) 23 Page - STMicroelectronics

STM32U073RCU6TR Datasheet(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL