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54HC4040 Datasheet(PDF) 3 Page - Silicon Supplies |
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54HC4040 Datasheet(HTML) 3 Page - Silicon Supplies |
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3 / 7 page ![]() Page 3 of 7 www.siliconsupplies.com PARAMETER SYMBOL MIN MAX UNITS DC Supply Voltage VCC 2 6 V DC Input or Output Voltage VIN ,VOUT 0 VCC V Operating Temperature Range TJ -55 +125 °C VCC = 2.0V 0 1000 VCC = 4.5V 0 500 Input Rise or Fall Times VCC = 6.0V tr, tf 0 400 ns Recommended Operating Conditions 3 (Voltages referenced to GND) Absolute Maximum Ratings 1 PARAMETER SYMBOL VALUE UNIT DC Supply Voltage (Referenced to GND) VCC -0.5 to +7.0 V DC Input Voltage (Referenced to GND) VIN -0.5 to VCC +0.5 V DC Output Voltage VOUT -0.5 to VCC +0.5 V DC Input Current, per pad IIN ±20 mA DC Output Current, per pad IOUT ±25 mA DC VCC or GND Current, per pad ICC ±50 mA Power Dissipation in Still Air 2 PD 750 mW Storage Temperature Range TSTG -65 to 150 °C Rev 1.0 15/09/25 1. Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may reduce device reliability. 2. Measured in plastic DIP package, results in die form are dependent on die attach and assembly method. Pad Descriptions INPUTS Clock (Pad 10) Negative–edge triggering clock input. A high–to–low transition on this input advances the state of the counter, Reset (Pad 11) Active–high reset. A high level applied to this input asynchronously resets the counter to its zero state (forcing all Q outputs low). OUTPUTS Q1–Q12 (Pads 9, 7, 6, 5, 3, 2, 4, 13, 12, 14, 15, 1) Active–high outputs. Each Qn output divides the Clock input frequency by 2 N. 3. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND ≤ (VIN or VOUT) ≤ VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. High Speed CMOS Logic – 54HC4040 |
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