Electrical specifications

STA510F

8/26

DocID014268 Rev 5

Figure 3. Test circuit for low current deadtime

Figure 4. Test circuit for high current deadtime

Table 7. Vlow, Vhigh threshold variation with VL

VL

VLow max.

VHigh min.

Unit

2.7

0.7

1.5

V

3.3

0.8

1.7

V

5

0.85

1.85

V

Table 8. Logic truth table

TRI-STATE

INxA

INxB

Q1

Q2

Q3

Q4

Output mode

0x

x

OFF

OFF

OFF

OFF

Hi-Z

1

0

0

OFF

OFF

ON

ON

DUMP

1

0

1

OFF

ON

ON

OFF

NEGATIVE

1

1

0

ON

OFF

OFF

ON

POSITIVE

1

1

1

ON

ON

OFF

OFF

Not used

Low current dead time = MAX(DTr,DTf)

OUTxY

Vcc

(3/4)Vcc

(1/2)Vcc

(1/4)Vcc

t

DTf

DTr

Duty cycle = 50%

INxY

OUTxY

gnd

+Vcc

M58

M57

R 8

Ω

+

-

V67 =

vdc = Vcc/2

D03AU1458

High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))

+VCC

Rload=8

Ω

Q2

OUTxB

DTout(B)

DTin(B)

DTout(A)

C71 470nF

C70

470nF

C69

470nF

Iout=4.5A

Iout=4.5A

Q4

Q1

Q3

M64

INxB

M63

D00AU1162

M58

INxA

M57

DTin(A)

Duty cycle=A

Duty cycle=B

Duty cycle A and B: Fixed to have DC output current of 4.5A in the direction shown in figure

L68 22

μ

L67 22

μ

OUTxA