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STA529Q Datasheet(PDF) 37 Page - STMicroelectronics

Part # STA529Q
Description  FFX™ audio codec with analog and digital inputs and 2 x 1.2 W (or 2 x 100 mW HP) class-D amplifier
PDF  57 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA529Q Datasheet(HTML) 37 Page - STMicroelectronics

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STA529
Registers
Doc ID 13095 Rev 3
37/57
11
Registers
This section describes the set-up register used in the device.
11.1
Summary
Table 22.
Register summary
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x00
FFXCFG0
MUTE
POW_STBY
SOFT_
VOL_ON
BIN_SOFT
START
TIM_SOFT_VOL[3:0]
0x01
FFXCFG1
L1_R2
MUTE_ON_
INVALID
PWM_MODE[1:0]
PWM_SHIFT[1:0]
Reserved
0x02
MVOL
SET_VOL_MASTER[7:0]
0x03
LVOL
SET_VOL_LEFT[7:0]
0x04
RVOL
SET_VOL_RIGHT[7:0]
0x05
TTF0
TIM_TS_FAULT[15:8]
0x06
TTF1
TIM_TS_FAULT[7:0]
0x07
TTP0
TIM_TS_POWUP[15:8]
0x08
TTP1
TIM_TS_POWUP[7:0]
0x0A
S2PCFG0
BICLK_
STRB
LRCLK_
LEFT
SHARE_
BILR
MSB_FIRST
DATA_FORMAT[2:0]
MASTER_
MODE
0x0B
S2PCFG1
PDATA_LENGTH[1:0]
BICLK_OS[1:0]
MAP_L[1:0]
MAP_R[1:0]
0x0C
P2SCFG0
BICLK_
STRB
LRCLK_
LEFT
SDATAO_
ACT
MSB_FIRST
DATA_FORMAT[2:0]
MASTER_
MODE
0x0D
P2SCFG1
PDATA_LENGTH[1:0]
BICLK_OS[1:0]
MAP_L[1:0]
MAP_R[1:0]
0x14
PLLCFG0
PLL_DIREC
T_PROG
FRAC_
CTRL
DITHER_DISABLE[1:0]
IDF[3:0]
0x15
PLLCFG1
FRAC_INPUT[15:8]
0x16
PLLCFG2
FRAC_INPUT[7:0]
0x17
PLLCFG3
STRB
STRB_
BYPASS
NDIV[5:0]
0x18
PLLPFE
PLL_
BYP_ UNL
BICLK2PLL
PLL_PWDN
PFE1A
PFE1B
PFE2A
PFE2B
RESET_
FAULT
0x19
PLLST
PLL_
UNLOCK
PLL_PWD_
STATE
PLL_BYP_
STATE
Reserved
0x1E
ADCCFG
PGA[2:0]
INSEL
STBY
BYPASS_
CALIB
CLKENBL
Reserved
0x1F
CKOCFG
CLKOUT_
DIS
CLKOUT_SEL[1:0]
Reserved
0x20
MISC
OSC_DIS
P2P_FS_RANGE[2:0]
ADC_FS_RANGE[1:0]
P2P_IN_
ADC
CORE_
CLKENBL
0x21
PADST0
Reserved
0x22
PADST1
Reserved



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