Input logic

L6390

14/25

DocID14493 Rev 11

6

Input logic

Input logic is provided with an interlocking circuitry which avoids cross-conduction in case of

wrong signals on LIN and HIN tries to turn-on both LVG and HVG outputs at the same times.

In addition, to prevent cross conduction of the external MOSFETs, after each output is

turned off, the other output cannot be turned on before a certain amount of time (DT) (see

Figure 5: Dead time and interlocking timing definitions).

Table 9. Truth table

Input

Output

SD

LIN

HIN

LVG

HVG

LX(1)

1. X: don't care.

X(1)

LL

HH

L

L

L

HLHL

L

HL

LHL

HH

H

L

H