DAC8760IPWPR datasheet(29/69 Pages) TI2

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The +VSENSE pin is provided to enable sensing of the load by connecting to points electrically closer to the

load. This configuration allows the internal output amplifier to make sure that the correct voltage is applied

across the load, as long as headroom is available on the power supply. Ideally, this pin is used to correct for

resistive drops on the system board and is connected to VOUT at the pins. In some cases, both VOUT and

+VSENSE are brought out as pins and, through separate lines, connected remotely together at the load. In case

the +VSENSE line is cut, use an optional 5-kΩ resistor between VOUT and +VSENSE to prevent the amplifier

loop from breaking. The –VSENSE pin, on the other hand, is provided as a GND sense reference output from

the internal VOUT amplifier. The output swing of the VOUT amplifier is relative to the voltage seen at this pin.

The actual voltage difference between the –VSENSE pin and the device GND pins is not expected to be more

than a few 100 µV. The internal resistor in Figure 8-2 between the device internal GND and the –VSENSE pin is

typically 2 kΩ.

After power on, the power-on-reset circuit makes sure that all registers are at their default values. Therefore, the

voltage output buffer is in a Hi-Z state; however, the +VSENSE pin connects to the amplifier inputs through an

internal 60-kΩ feedback resistor (RFB in Figure 8-2). If the VOUT and +VSENSE pins are connected together,

the VOUT pin is also connected to the same node through the feedback resistor. This node is protected by

internal circuitry and settles to a value between GND and the reference input.

The output voltage (VOUT) can be expressed as Equation 1 and Equation 2.

For unipolar output mode:

CODE

VOUT

VREF • GAIN •

(1)

For bipolar output mode:

CODE

VREF

VOUT

VREF • GAIN •

GAIN •

(2)

where

• CODE is the decimal equivalent of the code loaded to the DAC

• N is the bits of resolution; 16 for DAC8760 and 12 for DAC7760

• VREF is the reference voltage; for internal reference, VREF = 5 V

• GAIN is automatically selected for a desired voltage output range as shown in Table 8-1

Table 8-1. Voltage Output Range vs Gain Setting(1)

VOLTAGE OUTPUT

GAIN

0 V to 5 V

0 V to 10 V

±5 V

±10 V

(1)

VREF = 5 V

The voltage range is set according to the value of the RANGE bits and the OVR bit in the Control Register. The

OVR bit makes the gain value in Table 8-1 increase by 10%, thereby increasing the voltage output range, as

shown in Table 8-8 (see Section 8.4.1 for more details).

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DAC7760, DAC8760

SBAS528D – JUNE 2013 – REVISED DECEMBER 2021

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DAC8760IPWPR Datasheet(PDF) 29 Page - Texas Instruments

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