DAC900

3

SBAS093B

ELECTRICAL CHARACTERISTICS (Cont.)

At TA = +25°C, +VA = +5V, +VD = +5V, differential transformer coupled output, 50Ω doubly terminated, unless otherwise specified.

DAC900U/E

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

DYNAMIC PERFORMANCE (Cont.)

Output Rise Time(2)

10% to 90%

2

ns

Output Fall Time(2)

10% to 90%

2

ns

Glitch Impulse

3pV-s

DC-ACCURACY

Full-Scale Output Range(3)(FSR)

All Bits High, IOUT

2.0

20.0

mA

Output Compliance Range

–1.0

+1.25

V

Gain Error

With Internal Reference

–10

±1

+10

%FSR

Gain Error

With External Reference

–10

±2

+10

%FSR

Gain Drift

With Internal Reference

±120

ppmFSR/

°C

Offset Error

With Internal Reference

–0.025

+0.025

%FSR

Offset Drift

With Internal Reference

±0.1

ppmFSR/

°C

Power-Supply Rejection, +VA

–0.2

+0.2

%FSR/V

Power-Supply Rejection, +VD

–0.025

+0.025

%FSR/V

Output Noise

IOUT = 20mA, RLOAD = 50Ω

50

pA/

√Hz

Output Resistance

200

k

Ω

Output Capacitance

IOUT, IOUT to Ground

12

pF

REFERENCE

Reference Voltage

+1.24

V

Reference Tolerance

±10

%

Reference Voltage Drift

±50

ppmFSR/

°C

Reference Output Current

10

µA

Reference Input Resistance

1M

Ω

Reference Input Compliance Range

0.1

1.25

V

Reference Small-Signal Bandwidth(4)

1.3

MHz

DIGITAL INPUTS

Logic Coding

Straight Binary

Latch Command

Rising Edge of Clock

Logic High Voltage, VIH

+VD = +5V

3.5

5

V

Logic Low Voltage, VIL

+VD = +5V

0

1.2

V

Logic High Voltage, VIH

+VD = +3V

2

3

V

Logic Low Voltage, VIL

+VD = +3V

0

0.8

V

Logic High Current, IIH(5)

+VD = +5V

±20

µA

Logic Low Current, IIL

+VD = +5V

±20

µA

Input Capacitance

5pF

POWER SUPPLY

Supply Voltages

+VA

+2.7

+5

+5.5

V

+VD

+2.7

+5

+5.5

V

Supply Current(6)

IVA

24

30

mA

IVA, Power-Down Mode

1.1

2

mA

IVD

815

mA

Power Dissipation

+5V, IOUT = 20mA

170

230

mW

+3V, IOUT = 2mA

50

mW

Power Dissipation, Power-Down Mode

45

mW

Thermal Resistance,

θ

JA

SO-28

75

°C/W

TSSOP-28

50

°C/W

NOTES: (1) At output IOUT, while driving a virtual ground. (2) Measured single-ended into 50Ω Load. (3) Nominal full-scale output current is 32x IREF; see Application

Section for details. (4) Reference bandwidth depends on size of external capacitor at the BW pin and signal level. (5) Typically 45

µA for the PD pin, which has an

internal pull-down resistor. (6) Measured at fCLOCK = 50MSPS and fOUT = 1.0MHz.