INA180B2 datasheet(23/53 Pages) TI2

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9.1.3 Signal Filtering

Provided that the INAx180 output is connected to a high impedance input, the best location to filter is at the

device output using a simple RC network from OUT to GND. Filtering at the output attenuates high-frequency

disturbances in the common-mode voltage, differential input signal, and INAx180 power-supply voltage. If

filtering at the output is not possible, or filtering of only the differential input signal is required, it is possible

to apply a filter at the input pins of the device. Figure 9-2 provides an example of how a filter can be used on the

input pins of the device.

VOUT

2.7 V to 5.5 V

Bias

IN±

IN+

OUT

Single-Channel

TI Device

RF < 10

RINT

RF < 10

RINT

Bus Voltage

±0.2 V to +26 V

RSENSE

Load

GND

f±3dB

3dB

2 (R

R )C

Figure 9-2. Filter at Input Pins

The addition of external series resistance creates an additional error in the measurement; therefore, the value

of these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal

bias network shown in Figure 9-2 present at the input pins creates a mismatch in input bias currents when a

differential voltage is applied between the input pins. If additional external series filter resistors are added to

the circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This

mismatch creates a differential error voltage that subtracts from the voltage developed across the shunt resistor.

This error results in a voltage at the device input pins that is different than the voltage developed across the

shunt resistor. Without the additional series resistance, the mismatch in input bias currents has little effect on

device operation. The amount of error these external filter resistors add to the measurement can be calculated

using Equation 5, where the gain error factor is calculated using Equation 4.

The amount of variance in the differential voltage present at the device input relative to the voltage developed

at the shunt resistor is based both on the external series resistance (RF) value as well as internal input resistor

RINT, as shown in Figure 9-2. The reduction of the shunt voltage reaching the device input pins appears as a

gain error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be

calculated to determine the amount of gain error that is introduced by the addition of external series resistance.

Calculate the expected deviation from the shunt voltage to what is measured at the device input pins is given

using Equation 4:

INT

1250 R

Gain Error Factor

(1250 R ) (1250 R

) (R

)

(4)

where:

• RINT is the internal input resistor.

• RF is the external series resistance.

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INA180, INA2180, INA4180

SBOS741H – APRIL 2017 – REVISED JULY 2022

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