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MAX3232CPWR.A Datasheet(PDF) 12 Page - Texas Instruments |
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MAX3232CPWR.A Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 30 page ![]() 9.2.1 Design Requirements • Recommended VCC is 3.3 V or 5 V. 3 V to 5.5 V is also possible • Maximum recommended bit rate is 250 kbit/s. Table 9-1. VCC vs Capacitor Values VCC C1 C2, C3, C4 3.3 V ± 0.3 V 0.1 µF 0.1 µF 5 V ± 0.5 V 0.047 µF 0.33 µF 3 V to 5.5 V 0.1 µF 0.47 µF 9.2.2 Detailed Design Procedure • All DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels. • Select capacitor values based on VCC level for best performance. 9.2.3 Application Curves ±9 ±8 ±7 ±6 ±5 ±4 ±3 ±2 ±1 0 1 2 3 4 5 6 0 1 2 3 4 5 6 7 8 9 10 Time ( s) DIN DOUT to RIN ROUT C001 VCC = 3.3 V Figure 9-2. 250 kbit/s Driver to Receiver Loopback Timing Waveform 10 Power Supply Recommendations VCC should be between 3 V and 5.5 V. Charge pump capacitors should be chosen using table in Typical Operating Circuit and Capacitor Values. MAX3232 SLLS410O – JANUARY 2000 – REVISED JUNE 2021 www.ti.com 12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3232 |
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