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THS7368IPW Datasheet(PDF) 23 Page - Texas Instruments |
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THS7368IPW Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 45 page ![]() Level Shift Internal Circuitry +V S 800kW Input Pin Input 0.1 mF g m +V S STCLPF THS7368 www.ti.com SBOS497 – DECEMBER 2009 INPUT MODE OF OPERATION: AC SYNC TIP As a result of this delay, sync may have an apparent CLAMP voltage shift. The amount of shift depends on the amount of droop in the signal as dictated by the input Some video DACs or encoders are not referenced to capacitor and the STC current flow. Because sync is ground but rather to the positive power supply. The used primarily for timing purposes with syncing resulting video signals are generally at too great a occurring on the edge of the sync signal, this shift is voltage for a dc-coupled video buffer to function transparent in most systems. properly. To account for this scenario, the THS7368 incorporates a sync-tip clamp circuit. This function requires a capacitor (nominally 0.1 μF) to be in series with the input. Although the term sync-tip-clamp is used throughout this document, it should be noted that the THS7368 would probably be better termed as a dc restoration circuit based on how this function is performed. This circuit is an active clamp circuit and not a passive diode clamp function. The input to the THS7368 has an internal control loop that sets the lowest input applied voltage to clamp at ground (0 V). By setting the reference at 0 V, the THS7368 allows a dc-coupled input to also function. Therefore, the sync-tip-clamp (STC) is considered Figure 39. Equivalent AC Sync-Tip-Clamp Input Circuit transparent because it does not operate unless the input signal goes below ground. The signal then goes through the same 150-mV level shifter, resulting in an While this feature may not fully eliminate overshoot output voltage low level of 300 mV. If the input signal issues on the input signal, in cases of extreme tries to go below 0 V, the THS7368 internal control overshoot and/or ringing, the STC system should help loop sources up to 6 mA of current to increase the minimize improper clamping levels. As an additional input voltage level on the THS7368 input side of the method to help minimize this issue, an external coupling capacitor. As soon as the voltage goes capacitor (for example, 10 pF to 47 pF) to ground in above the 0-V level, the loop stops sourcing current parallel with the external termination resistors can and becomes very high impedance. help filter overshoot problems. One of the concerns about the sync-tip-clamp level is It should be noted that this STC system is dynamic how the clamp reacts to a sync edge that has and does not rely upon timing in any way. It only overshoot—common in VCR signals, noise, DAC depends on the voltage that appears at the input pin overshoot, or reflections found in poor printed circuit at any given point in time. The STC filtering helps board (PCB) layouts. Ideally, the STC should not minimize level shift problems associated with react to the overshoot voltage of the input signal. switching noises or very short spikes on the signal Otherwise, this response could result in clipping on line. This architecture helps ensure a very robust the rest of the video signal because it may raise the STC system. bias voltage too much. When the ac STC operation is used, there must also To help minimize this input signal overshoot problem, be some finite amount of discharge bias current. As the control loop in the THS7368 has an internal previously described, if the input signal goes below low-pass filter, as shown in Figure 39. This filter the 0-V clamp level, the internal loop of the THS7368 reduces the response time of the STC circuit. This sources current to increase the voltage appearing at delay is a function of how far the voltage is below the input pin. As the difference between the signal ground, but in general it is approximately a 400-ns level and the 0-V reference level increases, the delay for the SD channel filters and approximately a amount of source current increases 150-ns delay for the SF filters. The effect of this filter proportionally—supplying up to 6 mA of current. is to slow down the response of the control loop so as Thus, the time to re-establish the proper STC voltage not to clamp on the input overshoot voltage but rather can be very fast. If the difference is very small, then the flat portion of the sync signal. the source current is also very small to account for minor voltage droop. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link(s): THS7368 |
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