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TLV70233DBVRG4 Datasheet(PDF) 15 Page - Texas Instruments |
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TLV70233DBVRG4 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 37 page ![]() P =(V V ) I - ´ D IN OUT OUT 15 TLV702 www.ti.com SLVSAG6D – SEPTEMBER 2010 – REVISED JULY 2019 Product Folder Links: TLV702 Submit Documentation Feedback Copyright © 2010–2019, Texas Instruments Incorporated 9 Power Supply Recommendations Connect a low output impedance power supply directly to the INPUT pin of the TLV702. Inductive impedances between the input supply and the INPUT pin can create significant voltage excursions at the INPUT pin during start-up or load transient events. 9.1 Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Refer to Thermal Information for thermal performance on the TLV702 evaluation module (EVM). The EVM is a two-layer board with two ounces of copper per side. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current and the voltage drop across the output pass element, as shown in Equation 2. (2) 10 Layout 10.1 Layout Guidelines Input and output capacitors should be placed as close to the device pins as possible. To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should be connected directly to the GND pin of the device. High ESR capacitors may degrade PSRR performance. 10.1.1 Thermal Consideration Thermal protection disables the output when the junction temperature rises to approximately 165°C, allowing the device to cool. When the junction temperature cools to approximately 145°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. The internal protection circuitry of the TLV702 has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TLV702 into thermal shutdown degrades device reliability. |
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