STM32H533CE datasheet(118/231 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32H533xx

118/231

DS14539 Rev 1

5.3.7

External clock source characteristics

High-speed external user clock generated from an external source

In bypass mode the HSE oscillator is switched off and the input pin is a standard GPIO.

The external clock signal must respect the Table 39 in addition to Table 57. The external

clock can be low-swing (analog) or digital. In case of a low-swing analog input clock, the

clock squarer must be activated (refer to RM0481).

Table 39. High-speed external user clock characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fHSE_ext

User external clock

source frequency

External digital/analog

clock

425

MHz

VHSEH

Digital OSC_IN input

high-level voltage

External digital clock

0.7 VDD

-VDD

VHSEL

Digital OSC_IN input

low-level voltage

VSS

0.3 VDD

tw(HSEH)/tw(HSEL) (2)

Digital OSC_IN input

high or low time

External digital clock

Visw(HSEH)

(VHSEH -VHSEH)(3)

Analog low-swing

OSC_IN peak-to-peak

amplitude

External analog low

swing clock

0.2

2/3 VDD

DuCyHSE

Analog low-swing

OSC_IN duty cycle

tr(HSE)/tf(HSE)

Analog low-swing

OSC_IN rise and fall

times

External analog low

swing clock, 10% to 90%

0.05 / fHSE_ext

0.3 / fHSE_ext

1. Specified by design - Not tested in production..

2. The rise and fall times for a digital input signal are not specified, but the VHSEH and VHSEL conditions must be fulfilled

anyway.

3. The DC component of the signal must ensure that the signal peaks are located between VDD and VSS.

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