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STM32F101V8 Datasheet(PDF) 28 Page - STMicroelectronics

Part # STM32F101V8
Description  Medium-density access line, ARM®-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces
PDF  101 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101V8 Datasheet(HTML) 28 Page - STMicroelectronics

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Pinouts and pin description
STM32F101x8, STM32F101xB
28/101
DocID13586 Rev 17
46
62
96
-
PB9
I/O
FT
PB9
TIM4_CH4 (8)
I2C1_SDA
-
-
97
-
PE0
I/O
FT
PE0
TIM4_ETR
-
-
-
98
-
PE1
I/O
FT
PE1
-
-
47
63
99
36
VSS_3
S-
VSS_3
--
48
64 100
1
VDD_3
S-
VDD_3
--
1. I = input, O = output, S = supply, HiZ= high impedance.
2. FT= 5 V tolerant.
3. Function availability depends on the chosen device. For devices having reduced peripheral counts, it is always the lower
number of peripherals that is included. For example, if a device has only one SPI, two USARTs and two timers, they will be
called SPI1, USART1 & USART2 and TIM2 & TIM 3, respectively. Refer to Table 2 on page 11.
4. If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should
be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).
5. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3
mA), the use of GPIOs PC13 to PC15 in output mode is limited: the speed should not exceed 2 MHz with a maximum load
of 30 pF and these IOs must not be used as a current source (e.g. to drive an LED).
6. Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even
after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the
Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the
STMicroelectronics website: www.st.com.
7. The pins number 2 and 3 in the VFQFPN36 package, and 5 and 6 in the LQFP48, UFQFPN48 and LQFP64 packages are
configured as OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be remapped by software on
these pins. For the LQFP100 package, PD0 and PD1 are available by default, so there is no need for remapping. For more
details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual.
The use of PD0 and PD1 in output mode is limited as they can only be used at 50 MHz in output mode.
8. This alternate function can be remapped by software to some other port pins (if available on the used package). For more
details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available
from the STMicroelectronics website: www.st.com.
Table 4. Medium-density STM32F101xx pin definitions (continued)
Pins
Pin name
Main
function(3)
(after reset)
Alternate functions(3)(4)
Default
Remap



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