MAX271ENG datasheet(6/16 Pages) AD

6 / 16 page

Maxim Integrated

Digitally-Programmed, Dual

2nd-Order Continuous Lowpass Filter

MAX270/MAX271

Pin Description

Detailed Description

Figures 1a, 1b, and 1c show the MAX270/MAX271 func-

tional diagrams. Both the MAX270 and MAX271 contain

two independent, second-order, Sallen-Key, lowpass

filter sections, A and B to provide a frequency vs. gain

rolloff of approximately 40dB/decade. These are not

switched-capacitor filters, but have a continuous-time

design similar to discrete active filters built around op

amps. The MAX270/MAX271 eliminate clock noise and

aliasing problems which limit low-noise performance of

switched-capacitor filters; resulting dynamic range is

over 96dB.

Each filter section contains two banks of programmable

capacitors, controlled by an internal 7-bit memory, which

set filter cutoff frequencies (fC) from 1kHz to 25kHz. The

filters provide two program modes. In FP mode, cutoff

frequencies are programmed by writing 7-bit data to one

of two memory addresses (one for each filter section).

Alternately, a pin-strap programming mode programs

both filter sections simultaneously. In this mode, both

memory latches are transparent (not addressable), and

data pins D0–D6 may be pin-strapped (hard-wired) to

set a common fC for both filter sections.

The filters are trimmed at the wafer level, setting 0 for

a maximum of 0.15dB passband peaking for fC pro-

grammed to 1kHz. Maximum passband peaking at other

codes is typically less than 0.15dB. Filter Q is not user-

programmable.

The MAX270 includes an uncommitted op amp (nonin-

verting input grounded); the MAX271 has an on-chip T/H

that tracks and holds the output of either filter section

(selectable). The held output is provided at T/H OUT. T/H

functions are controlled by writing control bits to internal

registers (in FP mode) or by control pins directly (in pin-

strap mode).

The MAX270 and MAX271 provide a low quiescent cur-

rent shutdown mode controlled by the SHDN pin, which

turns off internal amplifiers and disconnects all outputs,

reducing quiescent operating current to less than 15FA.

When the MAX271 is in FP mode, shutdown mode is

selected by writing control bits to memory (the SHDN

pin is disabled).

MAX270

Note: All digital input levels are TTL and CMOS compatible,

unless otherwise noted.

NAME

FUNCTION

OP OUT

Uncommitted Op Amp Output

V+

Positive Supply Voltage

OUTA

Filter A Output

SHDN

Shutdown Control. Low level

disconnects OUTA, OUTB, and OP OUT

and places device into shutdown mode.

INA

Filter A Input

V-

Negative Supply Voltage

INB

Filter B Input

OUTB

Filter B Output

GND

Ground

Write Control Input. A low level writes

data D0–D6 to program memory

addressed by A0. High level latches

data.

Chip-Select Input. Must be low for WR

input to be recognized.

Three-Level Address Input

Logic High: Addresses filter A

Logic Low: Addresses filter B

Connect to V-: Pin-strap mode

13-

D0–D6

7-Bit Data Inputs. Allows programming

of 128 cutoff frequencies in a 1kHz to

25kHz range.

OP IN

Uncommitted Op Amp Input

MAX271ENG Datasheet(PDF) 6 Page - Analog Devices

MAX271ENG Datasheet(HTML) 6 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL