12

Maxim Integrated

Digitally-Programmed, Dual

2nd-Order Continuous Lowpass Filter

MAX270/MAX271

Digital Threshold Levels

All digital inputs are TTL and CMOS compatible, unless

otherwise stated. Inputs are CMOS gates with less than

1µA leakage current and 8pF capacitance loading.

Typical logic voltage thresholds are a function of the V+

supply voltage as shown below (voltages are referenced

to GND).

Filter Performance

All MAX270/MAX271 internal amplifier and output stages

for filter sections. uncommitted op amp, and T/H are

identical. The outputs are designed to drive 5kω in paral-

lel with a maximum capacitance of 100pF. At higher load

levels, the output swing becomes asymmetric. All outputs

can be short circuited to GND for an indefinite duration.

The MAX270/MAX271 operating frequency range is

limited to approximately 2MHz by the bandwidth of the

internal amplifiers.

Filter Noise

Wideband filter noise over a 50kHz bandwidth is

12µVRMS and 38µVRMS per section for fC programmed

to 1kHz and 25kHz, respectively. A dynamic range of

over 96dB results.

Filter Input Impedance

At DC, the input impedance at INA and INB is equal to

the DC input impedance of the amplifier, which is about

5Mω. At higher frequencies, internal capacitors contrib-

ute to an effective input impedance that may fall as low

as 100kω at 25kHz.

MAX271 Track-and-Hold

The MAX271 T/H is functionally equivalent to a switched

200pF capacitor buffered by a unity-gain amplifier (Figures

1b and 1c). When the T/H pin is driven low, the output of

filter A or filter B (whichever is selected via control inter-

face) internally connects to the amplifier, and T/H OUT

follows the filter output. The offset at T/H OUT (±6mV max)

is the combined offset of the filter amplifier and the T/H

buffer. When T/H is pulled high, the switch disconnects

the filter signal from the T/H. The T/H capacitor holds the

stored charge, and that voltage is buffered at T/H OUT.

A low level at T/H EN disconnects T/H OUT, enabling mul-

tiplexed operation (Figure 3). T/H A/B selects between

OUTA and OUTB as the T/H input. In FP mode, the T/H

EN and T/H OUT functions are controlled by writing con-

trol bits to program memory, with T/H EN and T/H OUT

pins disabled.

See the Typical Operating Characteristics graphs for T/H

dynamic accuracy.

Note: For +5V single-supply operation, where incoming logic

signals are referenced to V-, typical logic thresholds are +3.5V.

Therefore, a CMOS (rail-to-rail) logic interface is recommended.·

Figure 3. MAX271 Multiplexed Operation

AY0

T/H OUT

T/H EN

CH1

Y1

INA

Y2

Y7

B

C

CHANNEL

SELECT

74HC238

T/H OUT

T/H EN

CH3

INA

T/H OUT

T/H EN

CH2

INA

OUTPUT

V+ (V)

LOGIC THRESHOLD

VOLTAGE (V)

8

+2.4

7

+2.3

6

+2.0

5

+1.75

4

+1.5

2.5

+1.0