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MPF0900AMBA2ES Datasheet(PDF) 163 Page - NXP Semiconductors |
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MPF0900AMBA2ES Datasheet(HTML) 163 Page - NXP Semiconductors |
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163 / 205 page  NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring All parameters are specified at TA = -40 °C to 125 °C, unless otherwise noted. Typical values are characterized at VIN = 5 V and TA = 25 °C, unless otherwise noted. Symbol Description Min Typ Max Unit • Minimum voltage to ensure a high state VHYST_FCCUx FCCUx input voltage hysteresis 0.1 – 0.4 V RPD_FCCUx FCCUx internal pull-down • FCCUx_RPULL_EN = 1 400 800 1300 kΩ RPU_FCCUx FCCUx internal pullup to VDDIO • FCCUx_RPULL_EN = 1 100 200 400 kΩ tFCCUx_DBNC0 FCCUx debounce time in PWM mode 0.8 1 1.2 μs tFCCUx_DBNC1 FCCUx debounce time • FCCUx_DBNC[1:0] = 00 1 3 4 μs tFCCUx_DBNC2 FCCUx debounce time • FCCUx_DBNC[1:0] = 01 4 6 8 μs tFCCUx_DBNC3 FCCUx debounce time • FCCUx_DBNC[1:0] = 10 8 12 16 μs tFCCUx_DBNC4 FCCUx debounce time • FCCUx_DBNC[1:0] = 11 16 20 24 μs tFCCUx_HF FCCUx high-frequency detection time 6 7.75 10 μs tFCCUx_LF FCCUx low-frequency detection time 51 64 80 μs Table 217. FCCU electrical characteristics...continued 14.8 ABIST The PF09 implements an analog built-in self test (ABIST) routine to evaluate the integrity of the voltage monitors, safety I/Os and other internal safety-related blocks. ABIST is intended to verify a minimum requirement for ASIL B systems to ensure the internal voltage monitoring circuits are able to notify the logic controller of an OV or UV condition using an internal reference. The following blocks will be tested during ABIST: • OV and UV comparators for each individual SWx, LDOx and VAON supply • OV and UV comparators for each individual VMONx input. • OV comparator for the internal VDIG supply. • OV comparator for the internal VANA supply. • TSD comparator for the thermal monitor • RSTB pin is tested for short to high conditions • FS0B pin is tested for short to high conditions If any of the comparators is not able to toggle during ABIST, the corresponding ABIST flag will be set to 1 to allow the MCU to inspect the fault condition and prevent unsafe operation. The ABIST flags cannot be cleared manually, and they can be cleared only after a new ABIST test is performed and passed. ABIST flags Description AB_SWx_OV SWx OV monitor ABIST flag AB_SWx_UV SWx UV monitor ABIST flag Table 218. ABIST flags PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 163 / 205 |
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