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64WQ Datasheet(PDF) 39 Page - Numonyx B.V |
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64WQ Datasheet(HTML) 39 Page - Numonyx B.V |
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39 / 46 page ![]() November 2007 Datasheet Order Number: 251407-13 39 32WQ and 64WQ Family with Asynchronous RAM Appendix E Ordering Information (Active Line Items) Figure 16: Decoder for Flash + RAM SCSP Family Devices F 2 0 W 0 Z B Q 8 D 3 R Package Pinout Indicator Product Line D esignator Flash D ensity Voltage Product Fam ily RD = SCSP PF = Pb-free SCSP 38F = Flash & R AM Stack Device 2 = 64-Mbit 1 = 32-Mbit 0 = No die W = Intel® W ireless Flash Memory 0 = No D ie Y = 1.8 Volt I/O Z = 3 Volt I/O Q= Q UAD+ ballout 3 0 RA M Density 4 = 32-Mbit 3 = 16-Mbit 2 = 8-M bit 1 = 4-M bit 0 = No Die 0 Param eter Location B = Bottom Param eter T = Top Parameter D = D ual Param eter Device D etails 0-9, A-D = 1st Generation, 130 nm E-R = 2 nd Generation, 90 nm (note: 90 nm is only 1.8 V I/O) S-Z = 3rd Generation, TBD |
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