64WQ datasheet(29/46 Pages) NUMONYX

29 / 46 page

November 2007

Datasheet

Order Number: 251407-13

32WQ and 64WQ Family with Asynchronous RAM

9.0

Device Operation

9.1

Bus Operations

Bus operations for the W18/W30 SCSP family involve the following chip enable and

output enable signals, respectively:

• F1-CE# for Flash Die#1 and F2-CE# for Flash Die#2

• F1-OE# for Flash Die#1 and F2-OE# for Flash Die#2

All other control signals are shared between the two flash die. Table to Table 16

explain the bus operations of products across this SCSP family. Refer to the W18/W30

discrete datasheets (order numbers 290701 and 290702) for single flash die SCSP bus

operations.

Table 14: Flash-Only Bus Operations

Mode

Sync Array Read

Active

Flash

DOUT

2, 3, 4

All Async /

Sync Non-Array

Read

Asserted

Flash

DOUT

1, 3, 4,

Write

VPPL

VPPH

Asserted

Flash

DIN

3, 4, 6

Output Disable

Active

Flash

High-Z

Standby

XXX

High-Z

Flash

High-Z

Reset

XXXX

High-Z

Flash

High-Z

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