M25PE40-VMP6TP datasheet(60/62 Pages) NUMONYX

60 / 62 page

Revision history

M25PE40

60/62

Revision history

Table 29.

Document revision history

Date

Revision

Changes

01-Apr-2004

0.1

Initial release.

09-Nov-2004

Write Protect (W) pin replaced by Top Block Lock (TBL).

Section 2.5: Reset (Reset) description modified. JEDEC signature

modified. Reset timings tRLRH, tRHSL and tSHRH removed from

Table 20: AC characteristics (33 MHz operation) and inserted in

Table 21: Reset timings (tRHSL modified). Document status

promoted from target specification to preliminary data.

01-Dec-2004

Top Block Lock (TBL) renamed as Top Sector Lock (TSL). Small text

changes. Deep Power-down mode clarified in Section 4.6: Active

Power, Standby Power and Deep Power-down modes.

11-Jan-2005

Notes removed from Table 28: Ordering information scheme.

Wording changes. SO16 package removed, SO8 wide package

added.

4-Oct-2005

Added Table 20: AC characteristics (33 MHz operation). Document

status promoted from preliminary data to full datasheet. Table 19:

AC characteristics (25 MHz operation) updated. Section 4.2: An

easy way to modify data, Section 4.3: A fast way to modify data,

Section 6.9: Page Write (PW) and Section 6.10: Page Program (PP)

updated to explain optimal use of Page Write and Page Program

instructions. Clock slew rate changed from 0.03 to 0.1 V/ns.

Updated Table 28: Ordering information scheme. Added

ECOPACK® information.

11-Aug 2006

Changed document to new template; amended figure in Feature

summary; replaced Figure 4: Bus master and memory devices on

the SPI bus; amended data in Table 19 and Table 20; amended title

of Figure 30: VFQFPN8 (MLP8) 8-lead very thin fine pitch quad flat

package no lead 6 × 5 mm, package outline and added a footnote;

amended name of the MP package in Table 28: Ordering

information scheme.

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