M25PE40-VMP6TP datasheet(22/62 Pages) NUMONYX

Part #	M25PE40-VMP6TP

Description	4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout

PDF	62 Pages

Scroll/Zoom	100%

Manufacturer	NUMONYX [Numonyx B.V]

Direct Link	http://www.numonyx.com

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22 / 62 page

Instructions

M25PE40

22/62

6.2

Write Disable (WRDI)

The Write Disable (WRDI) instruction (Figure 8) resets the Write Enable Latch (WEL) bit.

The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the

instruction code, and then driving Chip Select (S) High.

The Write Enable Latch (WEL) bit is reset under the following conditions:

●

Power-up

●

Write Disable (WRDI) instruction completion

●

Page Write (PW) instruction completion

●

Page Program (PP) instruction completion

●

Write Status Register (WRSR) instruction completion

●

Write to Lock Register (WRLR) instruction completion

●

Page Erase (PE) instruction completion

●

Subsector Erase (SSE) instruction completion

●

Sector Erase (SE) instruction completion

●

Bulk Erase (BE) instruction completion

Figure 8.

Write Disable (WRDI) instruction sequence

AI03750D

34567

High Impedance

Instruction

M25PE40-VMP6TP Datasheet(PDF) 22 Page - Numonyx B.V