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PISOS510DFGTSP Datasheet(PDF) 13 Page - Texas Instruments |
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PISOS510DFGTSP Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 22 page ![]() 8.1.1.2.1 Sizing RPULLUP The transistor output of ISOS510-SP operates in active, saturation, reverse, and cut-off regions, just like a regular transistor. To verify that the output does not get damaged when the output is saturated, the minimum value of RPULLUP can be calculated for a given pull-up voltage, VPULLUP, in Equation 1: RPULLUP> VPULLUP− VCESAT ICMAX (1) For the example of a feedback loop application, we can calculate the minimum required value for RPULLUP for a given VPULLUP of 10V, the maximum output voltage of the error amplifier (VCOMP(MAX) of 2.5V, and the maximum output current of the error amplifier is internally clamped at 1.6mA. The equation to calculate RPULLUP is shown in Equation 2: RPULLUP> VPULLUP− VCOMPMAX ICOMPCLAMP = 10V − 2.5V 1.6mA = 4.66kΩ (2) 8.1.1.2.2 Sizing RIN The input side of ISOS510-SP is current-driven. To limit the amount of current flowing into the AN pin, placing a series resistor, RIN, in series with the input as shown in Figure 8-1 is recommended. Depending on how the ISOS510-SP device is being used, the value of RIN can vary quite a bit. However, at a high level, to make sure the input does not get damaged, the minimum value of RIN can be calculated for a given input voltage, VIN, in Equation 3: RIN> VIN− VF ICMAX (3) However, in the use case of a feedback loop, RIN directly affects the mid-band gain of the loop. Assuming that the TL1431SP has been configured to give a reference voltage, VREF, of 2.5V and RPULLUP is 5kΩ, Equation 4 is used to calculate the maximum value of RIN verifying that the VCOMP voltage on the primary side can be pulled to the saturation voltage of the ISOS510-SP, VCE(SAT). RIN< VOUT− VREF−VF × RPULLUP ×CTRMIN VPULLUP − VCESAT = 5V− 2.5V−1.2V × 5kΩ ×100% 10V − 0.3V = 670Ω (4) 8.1.1.3 Application Curves The following curves shows ISOS510-SP bandwidth performance over different loading conditions where VIN = 5VDC + 2VPK. See Figure 6-4 for setup details. www.ti.com ISOS510-SP SLVSJM3 – MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: ISOS510-SP |
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