TLC271, TLC271A, TLC271B

Document number: DS35395 Rev. 1 - 0

42 of 51

www.diodes.com

November 2014

© Diodes Incorporated

TLC271, TLC271A, TLC271B

Application Notes

Offset Voltage Nulling Circuit

The TLC271 offers external input offset null control. Nulling of the input off set voltage may be achieved by adjusting a 100-

kΩ potentiometer

connected between the offset null terminals with the wiper connected as shown in Figure 95. The amount of nulling range varies with the bias

selection. In the high-bias mode, the nulling range allows the maximum offset voltage specified to be trimmed to zero. In low-bias and medium-

bias modes, total nulling may not be possible.

(a) Single Supply

(b) Split Supply

+

-

TLC271

N2

N1

IN-

IN+

VDD

VDD

VDD /2

+

-

TLC271

N2

N1

IN-

IN+

VDD-

VDD+

Figure 95 Offset Nulling Circuits

Input Bias Current

– Error Protection

The TLC271 has an extremely high input impedance. To use the inputs as a high impedance node, for example, greater than 100K, or to

accurately measure bias current, it will be necessary to place a guard ring around the input pins and drive this ring to a potential equivalent to

the common mode input voltage. In many cases this common mode potential may exist as a part of the feedback circuit and can be obtained

from one of the appropriate nodes. In the case for the SO8 package, pin 4 is connected to ground or Vdd-. Input pins 2 and 3 are normally

well above the voltage on pin 4 so a large potential voltage on the order of several volts is likely between pins 3 and 4. To prevent interference

with a 1 pA bias current the board resistance would need to be in the order of gigaohms to have a minimum impact. The goal is to have the

common mode potential on the guard ring, therefore reducing the stray voltage near the input pins to millivolts in normal applications. Any

solder flux residue, excess moisture, humidity or board contamination will be detrimental to using the device in a high impedance input mode.

VIC

V=

1

4

8

5

Figure 96 Bias Current Guarding for High Input Impedance Applications