DIO6905

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DIO6905 • Rev. 1.8

- 12 -

When using ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and

causes most of the output voltage ripple. For simplification, the output voltage ripple can be estimated with

Equation (9):

)

V

V

-

(1

*

C

*

L

*

f

*

8

V

=

V

IN

OUT

2

1

2

S

OUT

OUT

△

(9)

For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For

simplification, the output ripple can be approximated with Equation (10):

ESR

IN

OUT

1

S

OUT

OUT

R

*

)

V

V

(1

*

L

*

f

V

=

V

△

(10)

The characteristics of the output capacitor also affect the stability of the regulation system.

PCB Layout Recommendation

Efficient PCB layout is critical for stable operation. For the high-frequency switching converter, a poor layout

design can result in poor line or load regulation and stability issues. For best results, refer to Figure 19 and follow

the guidelines below.

(1) Place the high-current paths (GND, IN, and SW) as close to the device as possible with short, direct, and wide

traces.

(2) Keep the input capacitor as close to IN and GND as possible.

(3) Place the external feedback resistors next to FB.

(4) Keep the switching node SW short and away from the feedback network.

(5) Keep the VOUT sense line as short as possible or keep it away from the power inductor and the surrounding

inductors.

Figure 19. Two ends of input decoupling capacitor close to pin 2 and pin 3