AS7341L datasheet(39/65 Pages) AMSOSRAM

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AS7341L

Datasheet

• PUBLIC

DS000718

• v1-00 • 2020-May-25

│ 38

CFG8 Register (Address 0xB1)

Figure 50:

CFG8 Register

Addr: 0xB1

CFG8

Bit

Bit Name

Default

Access

Bit Description

7:6

FIFO_TH

R/W

FIFO Threshold.

Sets a threshold on the FIFO level that triggers the

first FIFO buffer interrupt (FINT).

VALUE

FIFO_LVL

5:3

reserved

SP_AGC

Spectral AGC Enable.

If asserted, device uses automatic gain control for

the spectral engines to maximize signal while

avoiding saturation.

1:0

reserved

10.2.4

Device Identification

The following registers provided device identification. Device ID, revision ID and auxiliary ID are read

only.

AUXID Register (Address 0x90)

Figure 51:

AUXID Register

Addr: 0x90

AUXID

Bit

Bit Name

Default

Access

Bit Description

7:4

reserved

3:0

AUXID

000

Auxiliary Identification

AS7341L Datasheet(PDF) 39 Page - ams-OSRAM AG

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