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R5F110MEAFB Datasheet(PDF) 73 Page - Renesas Technology Corp |
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R5F110MEAFB Datasheet(HTML) 73 Page - Renesas Technology Corp |
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73 / 154 page ![]() RL78/L1C 2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85°C) R01DS0192EJ0240 Rev.2.40 Page 73 of 149 Dec 22, 2023 Note 1. Cannot be used for lower 2 bit of ADCR register Note 2. Cannot be used for lower 4 bit of ADCR register Note 3. Excludes quantization error (±1/2 LSB). Caution Always use AVDD pin with the same potential as the VDD pin. (3) When reference voltage (+) = AVDD (ADREFP1 = 0, ADREFP0 = 0), reference voltage (-) = AVSS (ADREFM = 0), conversion target: ANI0 to ANI6 (TA = -40 to +85°C, 1.6 V ≤ AVDD = VDD ≤ 3.6 V, VSS = 0 V, AVSS = 0 V, Reference voltage (+) = AVDD, Reference voltage (-) = AVSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Resolution RES 2.4 V ≤ AVDD ≤ 3.6 V 8 12 bit 1.8 V ≤ AVDD ≤ 3.6 V 8 10 Note 1 1.6 V ≤ AVDD ≤ 3.6 V 8 Note 2 Overall error Note 3 AINL 12-bit resolution 2.4 V ≤ AVDD ≤ 3.6 V ±7.5 LSB 10-bit resolution 1.8 V ≤ AVDD ≤ 3.6 V ±5.5 8-bit resolution 1.6 V ≤ AVDD ≤ 3.6 V ±3.0 Conversion time tCONV ADTYP = 0, 12-bit resolution 2.4 V ≤ AVDD ≤ 3.6 V 3.375 μs ADTYP = 0, 10-bit resolution Note 1 1.8 V ≤ AVDD ≤ 3.6 V 6.75 ADTYP = 0, 8-bit resolution Note 2 1.6 V ≤ AVDD ≤ 3.6 V 13.5 ADTYP = 1, 8-bit resolution 2.4 V ≤ AVDD ≤ 3.6 V 2.5625 1.8 V ≤ AVDD ≤ 3.6 V 5.125 1.6 V ≤ AVDD ≤ 3.6 V 10.25 Zero-scale error Note 3 EZS 12-bit resolution 2.4 V ≤ AVDD ≤ 3.6 V ±6.0 LSB 10-bit resolution 1.8 V ≤ AVDD ≤ 3.6 V ±5.0 8-bit resolution 1.6 V ≤ AVDD ≤ 3.6 V ±2.5 Full-scale error Note 3 EFS 12-bit resolution 2.4 V ≤ AVDD ≤ 3.6 V ±6.0 LSB 10-bit resolution 1.8 V ≤ AVDD ≤ 3.6 V ±5.0 8-bit resolution 1.6 V ≤ AVDD ≤ 3.6 V ±2.5 Integral linearity error Note 3 ILE 12-bit resolution 2.4 V ≤ AVDD ≤ 3.6 V ±3.0 LSB 10-bit resolution 1.8 V ≤ AVDD ≤ 3.6 V ±2.0 8-bit resolution 1.6 V ≤ AVDD ≤ 3.6 V ±1.5 Differential linearity error Note 3 DLE 12-bit resolution 2.4 V ≤ AVDD ≤ 3.6 V ±2.0 LSB 10-bit resolution 1.8 V ≤ AVDD ≤ 3.6 V ±2.0 8-bit resolution 1.6 V ≤ AVDD ≤ 3.6 V ±1.5 Analog input voltage VAIN ANI0 to ANI6 0 AVDD V |
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