RX72N datasheet(68/179 Pages) RENESAS

68 / 179 page

RX72N Group

1. Overview

R01DS0343EJ0120 Rev.1.20

Page 68 of 179

Nov 15, 2023

Note 1. P53 is multiplexed with the BCLK pin function, so cannot be used as an I/O port pin when the external bus is enabled.

M12

PC1

A17

MTIOC3A/

TCLKD/PO18

SCK5/

SSLA2-A

ET0_ERXD

IRQ12

M13

VCC

P21

MTIOC1B/

MTIOC4A/

TIOCA3/

TMCI0/PO1

GTIOC2A RXD0/

SMISO0/

SSCL0/

SCL1/

USB0_EXIC

EN/

SSILRCK0

SDHI_CLK-C/

PIXD5

IRQ9

P20

MTIOC1A/

TIOCB3/

TMRI0/PO0

TXD0/

SMOSI0/

SSDA0/

SDA1/

USB0_ID/

SSIRXD0

SDHI_CMD-C/

PIXD4

IRQ8

P87

MTIOC4C/

TIOCA2

GTIOC1B SMOSI10/

SSDA10/

TXD10

EPLSOUT1 SDHI_D2-C/

PIXD2

P14

MTIOC3A/

MTCLKA/

TIOCB5/

TCLKA/TMRI2/

PO15

GTETRG

CTS1#/

RTS1#/

SS1#/CTX1/

USB0_OVRC

URA

IRQ4

USB0_DM

USB0_DP

TRDATA3 P55

D0[A0/D0]/

WAIT#/

EDREQ0

MTIOC4D/

TMO3

TXD7/

SMOSI7/

SSDA7/

CRX1

ET0_EXOU

IRQ10

VSS

PC7

A23/CS0#

MTIOC3A/

MTCLKB/

TMO2/PO31/

TOC0/

CACREF

GTIOC3A TXD8/

SMOSI8/

SSDA8/

SMOSI10/

SSDA10/

TXD10/

MISOA-A

ET0_COL

MMC_D7-A

IRQ14

N10

TRSYNC

P82

EDREQ1

MTIOC4A/

PO28

GTIOC2A SMOSI10/

SSDA10/

TXD10

ET0_ETXD

RMII0_TXD

MMC_D4-A

N11

PC3

A19

MTIOC4D/

TCLKB/PO24

GTIOC1B TXD5/

SMOSI5/

SSDA5

ET0_TX_E

QMO-A/QIO0-

A/SDHI_D0-A/

MMC_D0-A

N12

TRSYNC1 P75

CS5#

PO20

SCK11/

RTS11#

ET0_ERXD

RMII0_RX

SDHI_D2-A/

MMC_RES#-A

N13

TRDATA5 P74

A20/CS4#

PO19

SS11#/

CTS11#

ET0_ERXD

RMII0_RX

Table 1.8

List of Pin and Pin Functions (145-Pin TFLGA) (7/7)

Number

Power

Supply

Clock

System

Control

I/O Port

Bus

EXDMAC

SDRAMC

Timer

Communication

Memory I/F

Camera I/F

GLCDC

Interrupt

A/D

D/A

145-Pin

TFLGA

(MTU, TPU,

TMR, PPG,

RTC, CMTW,

POE, CAC)

(GPTW,

POEG)

(SCI, RSPI,

RIIC, CAN,

USB, SSIE)

(ETHERC,

PMGI)

(QSPI, SDHI,

MMCIF, PDC)

RX72N Datasheet(PDF) 68 Page - Renesas Technology Corp

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