ISO6040LDFPR datasheet(10/56 Pages) TI2

10 / 56 page

PARAMETER

TEST CONDITIONS

PACKAGE

UNIT

16-DW

16-DFP

16-DBQ

VISO

Withstand isolation voltage

VTEST = VISO , t = 60s (qualification);

VTEST = 1.2 × VISO , t = 1s (100%

production)

5000

3000

VRMS

(1)

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.

Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the

isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal

in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these

specifications.

(2)

This device is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured

by means of suitable protective circuits.

(3)

Testing is carried out in air to determine the surge immunity of the package.

(4)

Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier.

(5)

Apparent charge is electrical discharge caused by a partial discharge (pd).

(6)

All pins on each side of the barrier tied together creating a two-pin device.

(7)

1000VRMS per IEC 60664-1 for pollution degree 1, basic isolation use cases. For reinforced isolation use cases the working voltage is

package limited to 500VRMS for pollution degree 1. Please refer to IEC 60664-1 or relevant standard for other use cases and pollution

degrees.

ISO6040, ISO6041, ISO6042

SLLSFV3B – DECEMBER 2025 – REVISED AUGUST 2026

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ISO6040LDFPR Datasheet(PDF) 10 Page - Texas Instruments