HT46R46 datasheet(16/77 Pages) HOLTEK

16 / 77 page

HT46R46/C46/R47/C47/R48A/C48A/R49

Rev. 1.30

June 5, 2008

In addition, on entering an interrupt sequence or execut-

ing a subroutine call, the status register will not be

pushed onto the stack automatically. If the contents of

the status registers are important and if the subroutine

can corrupt the status register, precautions must be

taken to correctly save it.

Interrupt Control Register - INTC

This 8-bit register, known as the INTC register, controls

the operation of both external and internal timer inter-

rupts. By setting various bits within this register using

standard bit manipulation instructions, the enable/disable

function of each interrupt can be independently con-

trolled. A master interrupt bit within this register, the EMI

bit, acts like a global enable/disable and is used to set all

of the interrupt enable bits on or off. This bit is cleared

when an interrupt routine is entered to disable further in-

terrupt and is set by executing the

²RETI² instruction.

Timer/Event Counter Registers - TMR, TMRC

All devices possess a single internal 8-bit count-up

timer. An associated register known as TMR is the loca-

tion where the timer

¢s 8-bit value is located. This register

can also be preloaded with fixed data to allow different

time intervals to be setup. An associated control regis-

ter, known as TMRC, contains the setup information for

this timer, which determines in what mode the timer is to

be used as well as containing the timer on/off control

function.

Input/Output Ports and Control Registers

Within the area of Special Function Registers, the I/O

registers and their associated control registers play a

prominent role. All I/O ports have a designated register

correspondingly labeled as PA, PB, PC and PD. These

labeled I/O registers are mapped to specific addresses

within the Data Memory as shown in the Data Memory

table, which are used to transfer the appropriate output

or input data on that port. With each I/O port there is an

associated control register labeled PAC, PBC, PCC and

PDC, also mapped to specific addresses with the Data

Memory. The control register specifies which pins of that

port are set as inputs and which are set as outputs. To

setup a pin as an input, the corresponding bit of the con-

trol register must be set high, for an output it must be set

low. During program initialization, it is important to first

setup the control registers to specify which pins are out-

puts and which are inputs before reading data from or

writing data to the I/O ports. One flexible feature of these

registers is the ability to directly program single bits us-

ing the

²SET [m].i² and ²CLR [m].i² instructions. The

ability to change I/O pins from output to input and vice

versa by manipulating specific bits of the I/O control reg-

isters during normal program operation is a useful fea-

ture of these devices.

Pulse Width Modulator Registers -

PWM, PWM0, PWM1

Each device in the Cost-Effective A/D Type

microcontroller range contains either one or two Pulse

Width Modulators. Each one has its own related inde-

pendent control register. For devices with a single PWM

function this is register is known as PWM, while for de-

vices with two PWM functions, their control register

names are PWM0 and PWM1. The 8-bit contents of

these registers, defines the duty cycle value for the

modulation cycle of the corresponding Pulse Width

Modulator.

A/D Converter Registers -

ADR, ADRL, ADRH, ADCR, ACSR

Each device in the Cost-Effective A/D Type

microcontroller range contains a 4-channel 8-bit or 9-bit

A/D converter. The correct operation of the A/D requires

the use of one or two data registers, a control register

and a clock source register. For the HT46R46 device,

which has an 8-bit A/D converter, there is a single data

contain a 9-bit A/D converter, there are two data regis-

ters, a high byte data register known as ADRH, and a

low byte data register known as ADRL. These are the

the completion of an analog to digital conversion cycle.

The channel selection and configuration of the A/D con-

verter is setup via the control register ADCR while the

A/D clock frequency is defined by the clock source reg-

ister, ACSR.

HT46R46 Datasheet(PDF) 16 Page - Holtek Semiconductor Inc

HT46R46 Datasheet(HTML) 16 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

Datasheet Download

Link URL