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AL2007LA Datasheet(PDF) 2 Page - Samsung semiconductor

Part # AL2007LA
Description  Phase-Locked Loop (PLL) frequency synthesizer constructed in CMOS on single monolithic structure
PDF  16 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

AL2007LA Datasheet(HTML) 2 Page - Samsung semiconductor

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AL2007LA
0.35
µµµµm 20MHZ-170MHZ FSPLL
2
CORE PIN DESCRIPTION
Name
I/O Type
I/O Pad
Pin Description
VDD
DP
vddd
Digital power supply
VSS
DG
vssd
Digital ground
VDDA
AP
vdda
Analog power supply
VSSA
AG
vssa
Analog ground
VBB
AB/DB
vbba
Analog/Digital sub bias Power
FIN
DI
picc_bb
PLL clock input
FILTER
AO
poar50_bb
- Pump out is connected to Filter
- A capacitor is connected between the pin and analog ground
FOUT
DO
pot12_bb
20MHz~170MHz clock output
PWRDN
DI
picc_bb
FSPLL clock power down.
- PWRDN is High, PLL do not operating under this condition.
- If isn't used this pin, tied to VSS.
P[5:0]
DI
picc_bb
The values for 6bit programmable pre-divider.
M[7:0]
DI
picc_bb
The values for 8bit programmable main divider.
S[1:0]
DI
picc_bb
The values for 2bit programmable post scaler.
I/O Type Abbr.
— AI: Analog Input
— DI: Digital Input
— AO: Analog Output
— DO: Digital Output
— AB: Analog Bidirectional
— DB: Digital Bidirectional
— AP: Analog Power
— DP: Digital Power
— AG: Analog Ground
— DG: Digital Ground



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