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TSZ22111

• 15 • 001

BU21182FS

TSZ02201-0L5L0F301170-1-2

05.Feb.2019 Rev.001

0x9B: Control Mode

Name:

MODE_CFG

Address:

0x9B

Description:

This register configures the functions for calibration and sensor.

SCAN_SEL: Sensor High Impedance

This bit configures the states of enabled sensors during the other sensor is sensing.

0: Sensor outputs low.

1: Sensor becomes high impedance.

ADJ_OFS_ENB: Offset Calibration

This bit configures whether the offset calibration to the register

“Filter Sensor Data” is performed or not.

0: Offset calibration is enabled.

1: Offset calibration is disabled.

UNK_CAL_EN: Unexpected Long Press Calibration

This bit configures whether automatic calibration is performed when unexpected long press is detected.

This calibration is effective only to the unexpected long press switches.

0: Unexpected Long Press Calibration is disabled.

1: Unexpected Long Press Calibration is enabled.

LOWER_CAL_EN: Lower Calibration

This bit configures whether automatic calibration is performed when the data of the register

“Filter Sensor

Data

” is smaller than the reference value. When the offset calibration is enabled, this calibration is

disabled.

0: Lower Calibration is disabled.

1: Lower Calibration is enabled.

CAL_SFT_EN: Sampling Frequency Modulation

This bit configures whether frequency modulation is performed when calibration fails.

0: Frequency modulation is disabled.

1: Frequency modulation is enabled.

MLT_SW_EN: Multiple Switches Control

This bit configures whether multiple switches are usable at the same time. In the case multiple switches

are usable, the register

“Switch Detection Time” and “Multiple Pattern Switches Assignment” are disabled.

0: Multiple switches are unusable.

1: Multiple switches are usable.

Address

R/W

Initial

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x9B

R/W

0x80

MLT_SW

_EN

CAL_SFT

_EN

LOWER

_CAL_EN

UNK_CAL

_EN

ADJ_OFS

_ENB

SCAN_SEL

0x9C: Oversampling

Name:

OST_CFG

Address:

0x9C

Description:

This register configures the number of oversampling to reject chattering. The result is reflected to the register

“Switch ON Detection” and “Switch OFF Detection” when ON / OFF judgment is same as “OST[3:0]+1”

times.

Address

R/W

Initial

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x9C

R/W

0x03

OST[3:0]

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