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74LVC1G74GS Datasheet(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74LVC1G74GS Datasheet(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 25 page ![]() 74LVC1G74 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 13 — 5 December 2016 12 of 25 NXP Semiconductors 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Measurement points are given in Table 10. VOL and VOH are typical output voltage levels that occur with the output load. Fig 9. The set (SD) and reset (RD) input to output (Q, Q) propagation delays, the set and reset pulse widths and the RD to CP recovery time |
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