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74LVC157A

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Product data sheet

Rev. 7 — 25 November 2011

3 of 17

Nexperia

74LVC157A

Quad 2-input multiplexer

5.

Pinning information

5.1 Pinning

Fig 4.

Logic diagram

1Y

1I1

1I0

2Y

2I1

2I0

3Y

3I1

3I0

mna484

4Y

4I1

4I0

S

E

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 5.

Pin configuration for SO16 and (T)SSOP16

Fig 6.

Pin configuration for DHVQFN16

74LVC157A

SVCC

1I0

E

1I1

4I0

1Y

4I1

2I0

4Y

2I1

3I0

2Y

3I1

GND

3Y

001aac930

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

001aac931

74LVC157A

2Y

3I1

2I1

3I0

2I0

4Y

GND(1)

1Y

4I1

1I1

4I0

1I0

E

Transparent top view

7

10

6

11

5

12

4

13

3

14

2

15

terminal 1

index area