© Nexperia B.V. 2017. All rights reserved

74LVC157A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 25 November 2011

9 of 17

Nexperia

74LVC157A

Quad 2-input multiplexer

Test data is given in Table 8. Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

Fig 9.

Test circuit for measuring switching times

VM

VM

tW

tW

10 %

90 %

0 V

VI

VI

negative

pulse

positive

pulse

0 V

VM

VM

90 %

10 %

tf

tr

tr

tf

001aaf615

VCC

VI

VO

DUT

CL

RT

RL

PULSE

GENERATOR

Table 8.

Test data

Supply voltage

Input

Load

VI

tr, tf

CL

RL

1.2 V

VCC

 2 ns

30 pF

1 k



1.65 V to 1.95 V

VCC

 2 ns

30 pF

1 k



2.3 V to 2.7 V

VCC

 2 ns

30 pF

500



2.7V

2.7V

 2.5 ns

50 pF

500



3.0Vto 3.6V

2.7V

 2.5 ns

50 pF

500

