ST62T30B datasheet(32/86 Pages) STMICROELECTRONICS

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ST62T30B ST62E30B

IINTERRUPTS (Cont’d)

Interrupt Polarity Register (IPR)

Address: DAh

—

Read/Write

In conjunction with IOR register ESB bit, the polar-

ity of I/O pins triggered interrupts can be selected

by setting accordingly the Interrupt Polarity Regis-

ter (IPR). If a bit in IPR is set to one the corre-

sponding port interrupt is inverted (e.g. IPR bit 2 =

1 ; port C generates interrupt on rising edge. At re-

set, IPR is cleared and all port interrupts are not in-

verted (e.g. Port C generates interrupts on falling

edges).

Bit 7 - Bit 4 =

Unused.

Bit 3 =

Port D Interrupt Polarity.

Bit 2 =

Port C Interrupt Polarity.

Bit 1=

Port A Interrupt Polarity.

Bit 0 =

Port B Interrupt Polarity.

Tables 12. I/O Interrupts selections according to IPR, IOR programming

PortD PortC PortA PortB

GEN

IPR3

IPR0

IOR5

Port B occurrence

Port D occurrence

Interrupt

source

falling edge

rising edge

falling edge

rising edge

falling edge

rising edge

falling edge

rising edge

falling edge

Disabled

GEN

IPR1

IOR6

Port A occurrence

Interrupt

source

falling edge

low level

rising edge

high level

Disabled

IPR2

Port C occurrence

Interrupt source

falling edge

rising edge

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