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THS7374IPWR Datasheet(PDF) 21 Page - Texas Instruments

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Part # THS7374IPWR
Description  4-Channel SDTV Video Amplifier with 6th-Order Filters and 6-dB Gain
PDF  37 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

THS7374IPWR Datasheet(HTML) 21 Page - Texas Instruments

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INPUT MODE OF OPERATION: AC BIAS
Level
Shift
Internal
Circuitry
+3.3V
+3.3V
800kW
R
PU
Input
Pin
Input
C
0.1 F
m
IN
V
=V
DC
S
800kW
800k
+R
W
PU
(1)
THS7374
www.ti.com....................................................................................................................................................................................................... SLOS590 – JULY 2008
discharge current. If more hum rejection is desired or
is very flexible; the output dc bias point is the primary
there is a loss of sync occurring, simply decrease the
factor. For example, if the output dc bias point is
0.1-
µF input coupling capacitor. A decrease from 0.1
desired to be mid-rail on a 3.3-V supply, then the
µF to 0.047 µF increases the hum rejection by a
input dc bias point is recommended to be (1.6 V –
factor of 2:1. Alternatively, an external pull-down
300 mV)/2 = 0.65 V. Thus, the pull-up resistor
resistor to ground may be added that decreases the
calculates to a standard 3.3-M
Ω resistor, resulting in
overall
resistance
and
ultimately
increases
the
0.644 V. If the output dc-bias point is desired to be
discharge current.
1.6 V with a 5-V power supply, then the pull-up
resistor
value
calculates
to
be
approximately
To ensure proper stability of the ac STC control loop,
5.36-M
Ω.
the source impedance must be less than 1-k
Ω with
the input capacitor in place. Otherwise, there is a
Keep in mind that the internal 800-k
Ω resistor has a
possibility for the control loop to ring; this ringing may
±20% variance. As such, the calculations should take
appear on the THS7374 output. Because most DACs
this variance into account. For the 0.644-V input bias
or encoders use resistors to establish the voltage,
voltage example above using an ideal 3.3-M
Ω
which are typically less than 300-
Ω, meeting the less
resistor, the input dc bias voltage is about 0.644 V
than 1-k
Ω requirement is easily done. However, if the
(±0.1 V).
source impedance looking from the THS7374 input
The value of the output bias is very flexible and is left
perspective is very high, simply adding a 1-k
Ω
to each individual design. It is important to ensure
resistor to GND ensures proper operation of the
that the signal does not clip or saturate the video
THS7374.
signal. Thus, it is recommended to ensure the output
bias voltage is between 0.9 V and (VS+ – 1 V). For
100%
color
saturated
CVBS
or
signals
with
Macrovision, the CVBS signal can reach up to 1.23
Sync tip clamps are ideal for signals that have
VPP input, or 2.46 VPP output. In contrast, other
horizontal and/or vertical syncs associated with them.
signals are typically 0.7 VPP input, or 1.4 VPP output.
However, some video signals do not have a sync
As such, the output bias voltage must account for a
embedded within the signal. If ac-coupling of these
worst-case situation depending on the potential
signals is desired, then a dc bias is required to
signals.
properly set the dc operating point within the
THS7374. This function is easily accomplished with
One other issue that must be taken into account is
the THS7374 by simply adding an external pull-up
the dc-bias point as a function of the power supply.
resistor to the positive power supply, as shown in
As such, there is an impact on the system PSRR. To
Figure 39.
help reduce this impact, the input capacitor combines
with the pull-up resistance to function as a low-pass
filter. Additionally, the time to charge the capacitor to
the final dc bias point is also a function of the pull-up
resistor and the input capacitor. Lastly, the input
capacitor forms a high-pass filter with the parallel
impedance of the pull-up resistor and the 800-k
Ω
resistor. In general, it is good to have this high-pass
filter at approximately 3-Hz to minimize any potential
droop on a P’B, P’R, or non-sync B’ or R’ signal. A
0.1-
µF input capacitor with a 3.3-MΩ pull-up resistor
equates to a 2.5-Hz high-pass corner frequency.
This mode of operation is recommended for use with
chroma (C’), P’B, P’R, U’, V’, and non-sync R'G'B’
Figure 39. AC-Bias Input Mode Circuit
signals. This method can also be utilized with signals
Configuration
with sync if desired. The benefit of using the STC
function is that it maintains a constant back porch
voltage as opposed to a back porch voltage that
The dc voltage that appears at the input pin is equal
fluctuates depending on the video content. Because
to Equation 1:
the corner frequency of the input is a very low 2.5 Hz,
then this is still very good performance, but not as
good relative to a STC configuration.
The THS7374 allowable input range is approximately
0 V to (VS+ – 1.5 V), which allows for a very wide
input voltage range. As such, the input dc bias point
Copyright © 2008, Texas Instruments Incorporated
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