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TMS320DM335 Datasheet(PDF) 86 Page - Texas Instruments |
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TMS320DM335 Datasheet(HTML) 86 Page - Texas Instruments |
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86 / 156 page ![]() 3.12.1 Boot Modes Overview TMS320DM335 Digital Media System-on-Chip (DMSoC) SPRS528 – JULY 2008 www.ti.com DM335’s ARM ROM boot loader (RBL) executes when the BOOTSEL[1:0] pins indicate a condition other than the normal ARM EMIF boot. • If BTSEL[1:0] = 01 - Asynchronous EMIF (AEMIF) boot. This mode is handled by hardware control and does not involve the ROM. In the case of OneNAND, the user is responsible for putting any necessary boot code in the OneNAND's boot page. This code shall configure the AEMIF module for the OneNAND device. After the AEMIF module is configured, booting will continue immediately after the OneNAND’s boot page with the AEMIF module managing pages thereafter. • The RBL supports 3 distinct boot modes: – BTSEL[1:0] = 00 - ARM NAND Boot – BTSEL[1:0] = 10 - ARM MMC/SD Boot – BTSEL[1:0] = 11 - ARM UART Boot • If NAND boot fails, then MMC/SD mode is tried. • If MMC/SD boot fails, then MMC/SD boot is tried again. • If UART boot fails, then UART boot is tried again. • RBL uses GIO61 to indicate boot status (can use to blink LED): – After reset, GIO61 is initially driven low (e.g LED off) – If NAND boot fails and then MMC/SD boot fails, then GIO61 shall toggle at 4Hz while MMC/SD boot is retried. – If MMC/SD boot fails, then GIO61 shall toggle at 4Hz while MMC/SD boot is retried – If UART boot fails, then GIO61 shall toggle at 2Hz while UART boot is retried – When boot is successful, just before program control is given to UBL, GIO61 is driven high (e.g. LED on) – DM335 Timer0 shall be used to accurately toggle GIO61 at 4Hz and 2Hz • ARM ROM Boot - NAND Mode – No support for a full firmware boot. Instead, copies a second stage user boot loader (UBL) from NAND flash to ARM internal RAM (AIM) and transfers control to the user-defined UBL. – Support for NAND with page sizes up to 2048 bytes. – Support for magic number error detection and retry (up to 24 times) when loading UBL – Support for up to 30KB UBL (32KB IRAM - ~2KB for RBL stack) – Optional, user-selectable, support for use of DMA and I-cache during RBL execution (i.e.,while loading UBL) – Supports booting from 8-bit NAND devices (16-bit NAND devices are not supported) – Supports 4-bit ECC (1-bit ECC is not supported) – Supports NAND flash that requires chip select to stay low during the tR read time • ARM ROM Boot - MMC/SD Mode – No support for a full firmware boot. Instead, copies a second stage User Boot Loader (UBL) from MMC/SD to ARM Internal RAM (AIM) and transfers control to the user software. – Support for MMC/SD Native protocol (MMC/SD SPI protocol is not supported) – Support for descriptor error detection and retry (up to 24 times) when loading UBL – Support for up to 30KB UBL (32KB - ~2KB for RBL stack) • ARM ROM Boot - UART mode – No support for a full firmware boot. Instead, loads a second stage user boot loader (UBL) via UART to ARM internal RAM (AIM) and transfers control to the user software. – Support for up to 30KB UBL (32KB - ~2KB for RBL stack) The general boot sequence is shown in Figure 3-6. For more information, refer to the TMS320DM335 Digital Media System-on-Chip (DMSoC) ARM Subsystem Reference Guide (literature number SPRUFX7). Detailed Device Description 86 Submit Documentation Feedback |
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