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JS48F4400P0VB00 Datasheet(PDF) 83 Page - Numonyx B.V |
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JS48F4400P0VB00 Datasheet(HTML) 83 Page - Numonyx B.V |
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83 / 99 page ![]() November 2007 Datasheet Order Number: 306666-11 83 P30 Figure 42: Block Erase Flowchart Start FULL ERASE STATUS CHECK PROCEDURE Repeat for subsequent block erasures. Full Status register check can be done after each block erase or after a sequence of block erasures. Write 0xFF after the last operation to enter read array mode. Only the Clear Status Register command clears SR[1, 3, 4, 5]. If an error is detected, clear the Status register before attempting an erase retry or other error recovery. No Suspend Erase 1 0 0 0 1 1,1 1 1 0 Yes Suspend Erase Loop 0 Write 0x20, Block Address Write 0xD0, Block Address Read Status Register SR[7] = Full Erase Status Check (if desired) Block Erase Complete Read Status Register Block Erase Successful SR[1] = Block Locked Error BLOCK ERASE PROCEDURE Bus Operation Command Comments Write Block Erase Setup Data = 0x20 Addr = Block to be erased (BA) Write Erase Confirm Data = 0xD0 Addr = Block to be erased (BA) Read None Status Register data. Idle None Check SR[7]: 1 = WSM ready 0 = WSM busy Bus Operation Command Comments SR[3] = V PP Range Error SR[4,5] = Command Sequence Error SR[5] = Block Erase Error Idle None Check SR[3]: 1 = V PP Range Error Idle None Check SR[4,5]: Both 1 = Command Sequence Error Idle None Check SR[5]: 1 = Block Erase Error Idle None Check SR[1]: 1 = Attempted erase of locked block; erase aborted. (Block Erase) (Erase Confirm) |
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