| Electronic Components Datasheet Search |
|
M74HC40103 Datasheet(PDF) 1 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M74HC40103 Datasheet(HTML) 1 Page - STMicroelectronics |
|
1 / 16 page ![]() 1/16 September 2001 s HIGH SPEED : fMAX = 38MHz (TYP.) at VCC = 6V s LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 40103 DESCRIPTION The M74HC40103 is an high speed CMOS 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER fabricated with silicon gate C2MOS technology. The HC40103 consists of an 8 stage synchronous down counter with a single output which is active when the internal count is zero. The HC40103 contains a single 8-bit binary counter. This device has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the CARRY-OUT / ZERO DETECT output are active low logic. In normal operation the counter is decremented by one count on each positive transition of the CLOCK. Counting is inhibited when the CARRY-IN / COUNTER ENABLE (CI/CE) input is high. The CARRY-OUT / ZERO-DETECT (CO/ZD) output goes low when the count reaches zero if the CI/CE input is low, and remains low for one full clock period. When the SYNCHRONOUS PRESET-ENABLE (SPE) input is low, data at the J input is clocked into the counter on the next positive clock transition regardless of the state of the CI/CE input. When the ASYNCHRONOUS PRESET-ENABLE (APE) input is low, data at the J inputs is asynchronously forced into the counter regardless of the state of the SPE CI/CE or CLOCK inputs. J input J0-J7 represent a singular 8-bit binary word. When the CLEAR, CLR input is low, the counter is asynchronously cleared to its maximum count M74HC40103 8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAG E TUBE T & R DIP M74HC40103B1R SOP M74HC40103M1R M74HC40103RM13TR TSSOP M74HC40103TTR TSSOP DIP SOP |
Similar Part No. - M74HC40103 |
|
Similar Description - M74HC40103 |
|
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |