AIS326DQ datasheet(20/49 Pages) STMICROELECTRONICS

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Digital interface

AIS326DQ

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of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SPC just before the

rising edge of CS.

bit 0: RW bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0)

from the device is read. In latter case, the chip will drive SDO at the start of bit 8.

bit 1: MS bit. When 0, the address will remain unchanged in multiple read/write commands.

When 1, the address will be auto increased in multiple read/write commands.

bit 2-7: address AD(5:0). This is the address field of the indexed register.

bit 8-15: data DI(7:0) (write mode). This is the data that will be written into the device (MSb

first).

bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb

first).

In multiple read/write commands further blocks of 8 clock periods will be added. When MS

bit is 0 the address used to read/write data remains the same for every block. When MS bit

is ‘1’ the address used to read/write data is increased at every block.

The function and the behavior of SDI and SDO remain unchanged.

5.1.1

SPI Read

Figure 6.

SPI read protocol

The SPI Read command is performed with 16 clock pulses. Multiple byte read command is

performed adding blocks of 8 clock pulses at the previous one.

bit 0: READ bit. The value is 1.

bit 1: MS bit. When 0 do not increment address, when 1 increment address in multiple

reading.

bit 2-7: address AD(5:0). This is the address field of the indexed register.

bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb

first).

bit 16-... : data DO(...-8). Further data in multiple byte reading.

SPC

SDI

SDO

DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0

AD5 AD4 AD3 AD2 AD1 AD0

AIS326DQ Datasheet(PDF) 20 Page - STMicroelectronics