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SPEAR-09-B042 Datasheet(PDF) 10 Page - STMicroelectronics

Part # SPEAR-09-B042
Description  SPEAr짰 BASIC ARM 926EJ-S core, customizable logic, large IP portfolio SoC
PDF  66 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR-09-B042 Datasheet(HTML) 10 Page - STMicroelectronics

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Architecture properties
SPEAR-09-B042
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Architecture properties
●
Power save features:
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Operating frequency SW programmable
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Clock gating functionality
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Low frequency operating mode
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Automatic power saving controlled from application activity demands
●
Customizable logic to embed the customer's application:
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300 Kgate standard cell array
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Internal memory pool (64 + 8 Kbyte) fully configurable
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Up to 10 internal source clocks (some of these are programmable)
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No clock domain limits (every PL_GPIO can clock the customizable logic)
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Three memory paths toward the DRAM controller to ensure for optimal bandwidth
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Easily extendable architecture
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External memory bandwidth of each master tuneable to meet the target performance of
different applications



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