Rev.4.00, May 10, 2006, page 1 of 5

HD74LS390

Dual Decade Counters

REJ03D0485-0400

Rev.4.00

May 10, 2006

This circuit contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters.

The HD74LS390 incorporates dual divide-by-two and divide-by-five counters, which can be used to implement cycle

lengths equal to any whole and / or cumulative multiples of 2 and / or 5 up to divide-by-100. When connected as a bi-

quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output

stage.

Features

• Ordering Information

Part Name

Package Type

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LS390P

DILP-16 pin

PRDP0016AE-B

(DP-16FV)

P

—

HD74LS390FPEL

SOP-16 pin (JEITA)

PRSP0016DH-B

(FP-16DAV)

FP

EL (2,000 pcs/reel)

Note:

Please consult the sales office for the above package availability.

Pin Arrangement

(Top view)

GND

1A

1Clear

Output

1B

2A

2Clear

2B

Output

15

16

1

2

3

4

5

6

7

14

8

9

10

11

12

13

CLR

CLR

1B

2B

2A

1A

Outputs

Outputs