M3062JFHTFP datasheet(77/101 Pages) RENESAS

77 / 101 page

M16C/62P Group (M16C/62P, M16C/62PT)

5. Electrical Characteristics

Rev.2.41

Jan 10, 2006

Page 77 of 96

REJ03B0001-0241

Figure 5.17

Timing Diagram (5)

BCLK

CSi

td(BCLK−CS)

30ns.max

ADi

td(BCLK−AD)

30ns.max

ALE

30ns.max

th(BCLK−ALE)

−4ns.min

30ns.max

th(BCLK−RD)

0ns.min

th(BCLK−AD)

4ns.min

th(BCLK−CS)

4ns.min

−Z

DBi

tsu(DB−RD)

50ns.min

th(RD−DB)

0ns.min

tcyc

BHE

Read timing

WR,WRL,

WRH

30ns.max

th(BCLK−WR)

0ns.min

BCLK

CSi

td(BCLK−CS)

30ns.max

ADi

td(BCLK−AD)

30ns.max

ALE

30ns.max

td(BCLK−ALE)

th(BCLK−ALE)

−4ns.min

th(BCLK−AD)

4ns.min

th(BCLK−CS)

4ns.min

tcyc

th(WR−AD)

BHE

td(BCLK−DB)

40ns.max

4ns.min

th(BCLK−DB)

td(DB−WR)

(0.5

× tcyc−40)ns.min

(0.5

× tcyc−10)ns.min

th(WR−DB)

DBi

Write timing

td(BCLK−ALE)

td(BCLK−RD)

(0.5

× tcyc−10)ns.min

td(BCLK−WR)

0ns.min

th(RD−AD)

tac2(RD−DB)

−Z

Memory Expansion Mode, Microprocessor Mode

(for 1-wait setting and external area access)

(1.5

× tcyc−60)ns.max

tcyc=

f(BCLK)

VCC1=VCC2=3V

Measuring conditions

· VCC1=VCC2=3V

· Input timing voltage : VIL=0.6V, VIH=2.4V

· Output timing voltage : VOL=1.5V, VOH=1.5V

M3062JFHTFP Datasheet(PDF) 77 Page - Renesas Technology Corp

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