HD404339FS datasheet(74/80 Pages) RENESAS

74 / 80 page

HD404339 Series

AC Characteristics (V

CC = 4.0 to 5.5 V, GND = 0 V, Vdisp = VCC – 40 V to VCC, Ta = –20 to +75°C)

Item

Symbol Pins

Min

Typ

Max

Unit

Test Condition

Note

Clock oscillation frequency

OSC

0.4

4.5

MHz

System clock

divided by 4

X1, X2

—

32.768

—

kHz

Instruction cycle time

cyc

0.89

µs1

subcyc

—

244.14

—

µs

32-kHz oscillator,

1/8 system clock

division ratio

—

122.07

—

µs

32-kHz oscillator,

1/4 system clock

division ratio

Oscillation stabilization time

(ceramic oscillator)

OSC

—

7.5

Oscillation stabilization time

(crystal oscillator)

OSC

—

X1, X2

—

External clock high width

CPH

OSC

—

External clock low width

CPL

OSC

—

External clock rise time

CPr

OSC

—

External clock fall time

CPf

OSC

—

INT

0, INT1, EVNB high

widths

INT

0, INT1,

EVNB

2—

—

cyc /

subcyc

INT

0, INT1, EVNB low widths

INT

0, INT1,

EVNB

2—

—

cyc /

subcyc

RESET low width

RSTL

RESET

2—

—

cyc

STOPC low width

STPL

STOPC

1—

—

RESET rise time

RSTr

RESET

—

STOPC rise time

STPr

STOPC

—

Input capacitance

All input

pins except

TEST

—

f = 1 MHz,

in = 0 V

TEST

—

f = 1 MHz,

in = 0 V

—

180

Notes: 1. When using the subsystem oscillator (32.768 kHz), one of the following relationships for f

OSC

must be applied.

0.4 MHz

≤ f

OSC ≤ 1.0 MHz or 1.6 MHz ≤ fOSC ≤ 4.5 MHz

The operating range for f

OSC can be set with bit 1 of system selection register 1 (SSR1:

$027).

2. The oscillation stabilization time is the period required for the oscillator to stabilize in the

following situations:

HD404339FS Datasheet(PDF) 74 Page - Renesas Technology Corp

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