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HD6432351 Datasheet(PDF) 361 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 361 Page - Renesas Technology Corp |
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361 / 1025 page ![]() Section 9 I/O Ports Rev. 3.00 Sep 15, 2006 page 327 of 988 REJ09B0330-0300 Port Description Pins Mode 1 Mode 2* 1 Mode 3*1 Mode 4 Mode 5 Mode 6* 1 Mode 7*1 Port D • 8-bit I/O port* 1 • Built-in MOS input pull-up* 1 PD7/D15 to PD0/D8 Data bus input/ output I/O port Data bus input/output I/O port Port E • 8-bit I/O port • Built-in MOS input pull-up* 1 PE7/D7 to PE0/D0 In 8-bit bus mode: I/O port In 16-bit bus mode: data bus input/output I/O port In 8-bit bus mode: I/O port In 16-bit bus mode: data bus input/output I/O port Port F • 8-bit I/O port PF7/ φ When DDR = 0: input port When DDR = 1 (after reset): φ output When DDR = 0 (after reset): input port When DDR = 1: φ output When DDR = 0: input port When DDR = 1 (after reset): φ output When DDR = 0 (after reset): input port When DDR = 1: φ output PF6/AS PF5/RD PF4/HWR PF3/LWR AS, RD, HWR, LWR output I/O port AS, RD, HWR, LWR output I/O port PF2/LCAS/ WAIT/ BREQO When WAITE = 0 and BREQOE = 0 (after reset): I/O port When WAITE = 1 and BREQOE = 0: WAIT input When WAITE = 0 and BREQOE = 1: BREQO input I/O port When WAITE = 0 and BREQOE = 0 (after reset): I/O port When WAITE = 1: and BREQOE = 0: WAIT input When WAITE = 0 and BREQOE = 1: BREQO output When RMTS2 to RMTS0 = B'001 to B'011, CW2 = 0, and LCASS = 0: LCAS output I/O port PF1/BACK PF0/BREQ When BRLE = 0 (after reset): I/O port When BRLE = 1: BREQ input, BACK output When BRLE = 0 (after reset): I/O port When BRLE = 1: BREQ input, BACK output |
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