HD6432351 datasheet(623/1025 Pages) RENESAS

623 / 1025 page

Section 13 Serial Communication Interface (SCI)

Rev. 3.00 Sep 15, 2006 page 589 of 988

REJ09B0330-0300

<End>

[1]

Yes

Initialization

Start transmission

Read TDRE flag in SSR

[2]

Write transmit data to TDR and

set MPBT bit in SSR

Yes

Read TEND flag in SSR

[3]

Yes

[4]

Clear DR to 0 and set DDR to 1

Clear TE bit in SCR to 0

TDRE = 1

All data transmitted?

TEND = 1

Break output?

Clear TDRE flag to 0

SCI initialization:

The TxD pin is automatically

designated as the transmit data

output pin.

After the TE bit is set to 1,

a frame of 1s is output, and

transmission is enabled.

SCI status check and transmit

data write:

Read SSR and check that the

TDRE flag is set to 1, then write

transmit data to TDR. Set the

MPBT bit in SSR to 0 or 1.

Finally, clear the TDRE flag to 0.

Serial transmission continuation

procedure:

To continue serial transmission,

be sure to read 1 from the TDRE

flag to confirm that writing is

possible, then write data to TDR,

and then clear the TDRE flag to

0. Checking and clearing of the

TDRE flag is automatic when the

DMAC or DTC is activated by a

transmit data empty interrupt

(TXI) request, and data is written

to TDR.

Break output at the end of serial

transmission:

To output a break in serial

transmission, set the port DDR to

1, clear DR to 0, then clear the

TE bit in SCR to 0.

[1]

[2]

[3]

[4]

Figure 13.10 Sample Multiprocessor Serial Transmission Flowchart

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