H8SX1663 datasheet(204/1158 Pages) RENESAS

204 / 1158 page

Section 6 Bus Controller (BSC)

Rev.1.00 Jun. 07, 2006 Page 152 of 1102

REJ09B0294-0100

6.2.10

SRAM Mode Control Register (SRAMCR)

SRAMCR specifies the bus interface of each area in the external address space as a basic bus

interface or a byte control SRAM interface.

In areas specified as 8-bit access space by ABWCR, the SRAMCR setting is ignored and the byte

control SRAM interface cannot be specified.

Bit

Bit Name

Initial Value

R/W

BCSEL7

R/W

BCSEL6

R/W

BCSEL5

R/W

BCSEL4

R/W

BCSEL3

R/W

BCSEL2

R/W

BCSEL1

R/W

BCSEL0

R/W

Bit

Bit Name

Initial Value

R/W



Bit

Bit Name

Initial

Value

R/W

Description

BCSEL7

BCSEL6

BCSEL5

BCSEL4

BCSEL3

BCSEL2

BCSEL1

BCSEL0

R/W

Byte Control SRAM Interface Select

Selects the bus interface for the corresponding area.

When setting a bit to 1, the bus interface select bits in

BROMCR and MPXCR must be cleared to 0.

0: Area n is basic bus interface

1: Area n is byte control SRAM interface

(n = 7 to 0)

7 to 0



All 0

Reserved

These are read-only bits and cannot be modified.

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