HD6433636SW datasheet(295/418 Pages) RENESAS

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Table 11.3 indicates the frequency deviation between the DTMF signals output by the DTMF

generator and the nominal (standard) signal values.

Table 11.3

Frequency Deviation of DTMF Signals from Nominal Signals

Symbol

Standard Signal

Frequency (Hz)

DTMF Signal

Output (Hz)

Frequency

Deviation (%)

697

694.44

–0.37

770

769.23

–0.10

852

851.06

–0.11

941

938.97

–0.22

1209

1212.12

0.26

1336

1333.33

–0.20

1477

1481.48

0.30

1633

1639.34

0.39

11.3.2

Operation Flow

The procedure for using the DTMF generator is given below.

1. Set the OSC clock division ratio in DTLR to match the frequency of the connected system

clock oscillator (1.2 MHz to 10 MHz in 400-kHz steps).

2. Select a row (R1 to R4) and/or column (C1 to C4) frequency with bits CLF1, CLF0, RWF1,

and RWF0 in DTCR.

3. Select row and/or column output with the CLOE and RWOE bits in DTCR, and set the DTEN

bit to 1 to enable the DTMF generator.

This procedure outputs the selected DTMF signal from the TONED pin.

HD6433636SW Datasheet(PDF) 295 Page - Renesas Technology Corp

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