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32182 Datasheet(PDF) 45 Page - Renesas Technology Corp |
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32182 Datasheet(HTML) 45 Page - Renesas Technology Corp |
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45 / 755 page ![]() 1-18 1 OVERVIEW 32182 Group User’s Manual (Rev.1.0) 1.4 Pin Assignments Table 1.4.1 Pin Assignments of the 32182 (4/4) During single-chip and external extension modes P03 Input Hi-z Hi-z During processor mode DB3 Input/output Hi-z Hi-z During single-chip and external extension modes P02 Input Hi-z Hi-z During processor mode DB2 Input/output Hi-z Hi-z During single-chip and external extension modes P01 Input Hi-z Hi-z During processor mode DB1 Input/output Hi-z Hi-z During single-chip and external extension modes P00 Input Hi-z Hi-z During processor mode DB0 Input/output Hi-z Hi-z P73 Input Hi-z Hi-z P72 Input Hi-z Hi-z P71 Input Hi-z Hi-z P70 Input Hi-z Hi-z During processor mode P43 Input Hi-z Hi-z During external extension and processor modes RD# Output Hi-z High level During processor mode P42 Input Hi-z Hi-z During external extension and processor modes BHE#/BHE# Output Hi-z High level During processor mode P41 Input Hi-z Hi-z During external extension and processor modes BLE#/BLE# Output Hi-z High level VCC-BUS --- ---- 136 P73/HACK# P73 HACK# - Input/output 137 P72/HREQ# P72 HREQ# - Input/output 138 P71/WAIT# P71 WAIT# - Input/output 139 P70/BCLK/WR# P70 BCLK WR# Input/output 143 VCC-BUS - VCC-BUS - - 144 VSS - VSS - - - Input/output 132 P03/DB3 P03 DB3 - Input/output - Input/output 133 P02/DB2 134 P01/DB1 P01 DB1 P02 DB2 135 P00/DB0 P00 DB0 BHE# Input/output 140 P43/RD# P43 RD# - Input/output - Input/output BLE# Input/output 141 P42/BHW#/BHE# 142 P41/BLW#/BLE# P41 BLW# P42 BHW# Port Other than port Other than port Pin No. Symbol Function Type - Input/output 124 P13/DB11 P13 DB11 - Input/output - Input/output 125 P12/DB10 126 P11/DB9 P11 DB9 P12 DB10 127 P10/DB8 P10 DB8 - Input/output 128 P07/DB7 P07 DB7 - Input/output - Input/output - Input/output 129 P06/DB6 130 P05/DB5 P05 DB5 P06 DB6 131 P04/DB4 P04 DB4 - Input/output Function Type State during reset State at reset release During single-chip and external extension modes P13 Input Hi-z Hi-z During processor mode DB11 Input/output Hi-z Hi-z During single-chip and external extension modes P12 Input Hi-z Hi-z During processor mode DB10 Input/output Hi-z Hi-z During single-chip and external extension modes P11 Input Hi-z Hi-z During processor mode DB9 Input/output Hi-z Hi-z During single-chip and external extension modes P10 Input Hi-z Hi-z During processor mode DB8 Input/output Hi-z Hi-z During single-chip and external extension modes P07 Input Hi-z Hi-z During processor mode DB7 Input/output Hi-z Hi-z During single-chip and external extension modes P06 Input Hi-z Hi-z During processor mode DB6 Input/output Hi-z Hi-z During single-chip and external extension modes P05 Input Hi-z Hi-z During processor mode DB5 Input/output Hi-z Hi-z During single-chip and external extension modes P04 Input Hi-z Hi-z During processor mode DB4 Input/output Hi-z Hi-z Condition Pin State When Reset |
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